From 21c9089de2fda281c48f46bb7afebd5a4455e099 Mon Sep 17 00:00:00 2001
From: bunnie <bunnie@kosagi.com>
Date: Sun, 26 Oct 2025 13:35:35 +0800
Subject: [PATCH] make pre-emption controllable

---
 services/bao1x-hal-service/src/lib.rs  | 27 ++++++++++++++++++++++++++
 services/bao1x-hal-service/src/main.rs | 17 +++++++++++++---
 2 files changed, 41 insertions(+), 3 deletions(-)

diff --git a/services/bao1x-hal-service/src/lib.rs b/services/bao1x-hal-service/src/lib.rs
index 9fcc702bc..8b4e248f1 100644
--- a/services/bao1x-hal-service/src/lib.rs
+++ b/services/bao1x-hal-service/src/lib.rs
@@ -73,6 +73,33 @@ impl UdmaGlobal {
     }
 }
 
+pub struct Hal {
+    conn: xous::CID,
+}
+impl Hal {
+    pub fn new() -> Self {
+        REFCOUNT.fetch_add(1, Ordering::Relaxed);
+        let xns = xous_names::XousNames::new().unwrap();
+        let conn =
+            xns.request_connection(SERVER_NAME_BAO1X_HAL).expect("Couldn't connect to bao1x HAL server");
+        Hal { conn }
+    }
+
+    pub fn set_preemption(&self, on: bool) {
+        xous::send_message(
+            self.conn,
+            xous::Message::new_blocking_scalar(
+                HalOpcode::SetPreemptionState.to_usize().unwrap(),
+                if on { 1 } else { 0 },
+                0,
+                0,
+                0,
+            ),
+        )
+        .expect("Couldn't setup preemption state");
+    }
+}
+
 impl UdmaGlobalConfig for UdmaGlobal {
     fn clock(&self, peripheral: PeriphId, enable: bool) { self.udma_clock_config(peripheral, enable); }
 
diff --git a/services/bao1x-hal-service/src/main.rs b/services/bao1x-hal-service/src/main.rs
index b152e29ad..974d4e989 100644
--- a/services/bao1x-hal-service/src/main.rs
+++ b/services/bao1x-hal-service/src/main.rs
@@ -216,7 +216,8 @@ fn main() {
     )
     .expect("couldn't claim IRQ");
 
-    // start the OS timer running
+    // setup the OS timer
+    let mut timer_run = false;
     let mut os_timer = CSR::new(ostimer_csr.as_ptr() as *mut u32);
     let ms = bao1x_api::SYSTEM_TICK_INTERVAL_MS;
     os_timer.wfo(utra::timer0::EN_EN, 0b0); // disable the timer
@@ -226,8 +227,10 @@ fn main() {
     // enable the timer
     os_timer.wfo(utra::timer0::EN_EN, 0b1);
 
-    // Set EV_ENABLE, this starts pre-emption
-    os_timer.wfo(utra::timer0::EV_ENABLE_ZERO, 0b1);
+    // Set EV_ENABLE according to timer_run
+    // timer is OFF at boot to help insure that processes 2 & 3 get larger time slices
+    // to operate & claim critical resources
+    os_timer.wfo(utra::timer0::EV_ENABLE_ZERO, if timer_run { 1 } else { 0 });
 
     // ---- "own" the Iox IRQ bank. This might need revision once bao1x aliasing is available. ---
     let irq_page = xous::syscall::map_memory(
@@ -549,6 +552,14 @@ fn main() {
                 }
                 buf.replace(list).expect("I2c message format error");
             }
+            HalOpcode::SetPreemptionState => {
+                // this is done as a blocking message because we want confirmation that
+                // this bit has been set before entering a critical section.
+                if let Some(scalar) = msg.body.scalar_message_mut() {
+                    timer_run = scalar.arg1 != 0;
+                    os_timer.wfo(utra::timer0::EV_ENABLE_ZERO, if timer_run { 1 } else { 0 });
+                }
+            }
             HalOpcode::InvalidCall => {
                 log::error!("Invalid opcode received: {:?}", msg);
             }