mirror of
https://github.com/saymrwulf/xous-core.git
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54 lines
1.3 KiB
ArmAsm
54 lines
1.3 KiB
ArmAsm
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.section .text.init, "ax"
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.global _start
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_start:
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li t0, 0xffffffff
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csrw mideleg, t0
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csrw medeleg, t0
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// Place the stack pointer at the end of RAM
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lw t0, 16(a0) // SRAM start
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lw t1, 20(a0) // SRAM length
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add sp, t0, t1
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// Install a machine mode trap handler
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la t0, abort
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csrw mtvec, t0
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// Start Rust
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j rust_entry
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// This is used only in debug mode.
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.global abort
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abort:
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j abort
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.global start_kernel
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start_kernel:
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// Delegate as much as we can supervisor mode
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li t0, 0xffffffff
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csrw mideleg, t0
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csrw medeleg, t0
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// Return to Supervisor mode (and enable interrupts)
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li t0, (1 << 11) | (1 << 5)
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// If arg6 is "true", also set mstatus.SUM to allow the kernel
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// to access userspace memory.
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andi a6, a6, 1
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slli a6, a6, 18
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or t0, t0, a6
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csrw mstatus, t0
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// Enable the MMU (once we issue `mret`) and flush the cache
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csrw satp, a3
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sfence.vma
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// Return to the address pointed to by $a4
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csrw mepc, a4
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// Reposition the stack at the offset passed by $a5
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move sp, a5
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// Issue the return, which will jump to $mepc in Supervisor mode
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mret
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