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38 lines
1.2 KiB
Python
38 lines
1.2 KiB
Python
#
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# Copyright 2017 Ettus Research (National Instruments)
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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"""
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Module
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"""
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import libpyusrp_periphs as lib
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import logging
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import periph_manager
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import dboard_manager
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log = logging.Logger("usrp_mpm.periphs")
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def init_periph_manager(mb_type=None, db_types={}, fpga=None):
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pass
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# Moved to periph_manager/base.py __init__
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# Next steps implemented in periph_manager/derived class
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#
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# 1. Load FPGA image
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# 2. Use motherboard and daughterboard types to load the FPGA image
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# 3. Create periph_manager object wth given mb_type + db_types information
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