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The PLL itself looks good since it can lock to the OCXO which provides a clean clock. The Fabric Clock is very jittery which can lead to false fails. That is why instead of locking to jittry reference signals we will just use the internal amplitude monitor which per default is enabled and read back the status bit. Once a signal has been detected the test will pass. |
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| .. | ||
| pyusrp_periphs | ||
| tests | ||
| usrp_mpm | ||
| aurora_bist_test.py | ||
| CMakeLists.txt | ||
| copy_python_module.cmake | ||
| e320_bist | ||
| n3xx_bist | ||
| setup.py.in | ||
| socket_test.py | ||
| test_lmk.py | ||
| usrp_hwd.py | ||
| usrp_update_fs | ||
| x4xx_bist | ||