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285 lines
14 KiB
C++
285 lines
14 KiB
C++
//
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// Copyright 2011-2014 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include "db_wbx_common.hpp"
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#include "adf4350_regs.hpp"
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#include "../common/adf435x_common.hpp"
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#include <uhd/types/tune_request.hpp>
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#include <uhd/utils/log.hpp>
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#include <uhd/types/dict.hpp>
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#include <uhd/types/ranges.hpp>
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#include <uhd/types/sensors.hpp>
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#include <uhd/utils/assert_has.hpp>
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#include <uhd/utils/algorithm.hpp>
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#include <uhd/utils/msg.hpp>
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#include <uhd/usrp/dboard_base.hpp>
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#include <boost/assign/list_of.hpp>
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#include <boost/format.hpp>
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#include <boost/math/special_functions/round.hpp>
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#include <boost/algorithm/string.hpp>
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using namespace uhd;
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using namespace uhd::usrp;
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using namespace boost::assign;
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/***********************************************************************
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* WBX Version 2 Constants
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**********************************************************************/
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static const uhd::dict<std::string, gain_range_t> wbx_v2_tx_gain_ranges = map_list_of
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("PGA0", gain_range_t(0, 25, 0.05))
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;
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static const freq_range_t wbx_v2_freq_range(68.75e6, 2.2e9);
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/***********************************************************************
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* Gain-related functions
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**********************************************************************/
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static double tx_pga0_gain_to_dac_volts(double &gain){
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//clip the input
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gain = wbx_v2_tx_gain_ranges["PGA0"].clip(gain);
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//voltage level constants
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static const double max_volts = 0.5, min_volts = 1.4;
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static const double slope = (max_volts-min_volts)/wbx_v2_tx_gain_ranges["PGA0"].stop();
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//calculate the voltage for the aux dac
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double dac_volts = gain*slope + min_volts;
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UHD_LOGV(often) << boost::format(
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"WBX TX Gain: %f dB, dac_volts: %f V"
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) % gain % dac_volts << std::endl;
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//the actual gain setting
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gain = (dac_volts - min_volts)/slope;
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return dac_volts;
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}
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/***********************************************************************
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* WBX Version 2 Implementation
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**********************************************************************/
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wbx_base::wbx_version2::wbx_version2(wbx_base *_self_wbx_base) {
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//register our handle on the primary wbx_base instance
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self_base = _self_wbx_base;
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////////////////////////////////////////////////////////////////////
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// Register RX properties
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////////////////////////////////////////////////////////////////////
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this->get_rx_subtree()->create<std::string>("name").set("WBXv2 RX");
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this->get_rx_subtree()->create<double>("freq/value")
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.coerce(boost::bind(&wbx_base::wbx_version2::set_lo_freq, this, dboard_iface::UNIT_RX, _1))
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.set((wbx_v2_freq_range.start() + wbx_v2_freq_range.stop())/2.0);
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this->get_rx_subtree()->create<meta_range_t>("freq/range").set(wbx_v2_freq_range);
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////////////////////////////////////////////////////////////////////
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// Register TX properties
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////////////////////////////////////////////////////////////////////
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this->get_tx_subtree()->create<std::string>("name").set("WBXv2 TX");
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BOOST_FOREACH(const std::string &name, wbx_v2_tx_gain_ranges.keys()){
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self_base->get_tx_subtree()->create<double>("gains/"+name+"/value")
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.coerce(boost::bind(&wbx_base::wbx_version2::set_tx_gain, this, _1, name))
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.set(wbx_v2_tx_gain_ranges[name].start());
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self_base->get_tx_subtree()->create<meta_range_t>("gains/"+name+"/range")
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.set(wbx_v2_tx_gain_ranges[name]);
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}
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this->get_tx_subtree()->create<double>("freq/value")
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.coerce(boost::bind(&wbx_base::wbx_version2::set_lo_freq, this, dboard_iface::UNIT_TX, _1))
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.set((wbx_v2_freq_range.start() + wbx_v2_freq_range.stop())/2.0);
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this->get_tx_subtree()->create<meta_range_t>("freq/range").set(wbx_v2_freq_range);
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this->get_tx_subtree()->create<bool>("enabled")
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.subscribe(boost::bind(&wbx_base::wbx_version2::set_tx_enabled, this, _1))
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.set(true); //start enabled
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//set attenuator control bits
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int v2_iobits = ADF435X_CE;
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int v2_tx_mod = TXMOD_EN|ADF435X_PDBRF;
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//set the gpio directions and atr controls
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self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_TX, v2_tx_mod);
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self_base->get_iface()->set_pin_ctrl(dboard_iface::UNIT_RX, RXBB_PDB|ADF435X_PDBRF);
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self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_TX, TX_PUP_5V|TX_PUP_3V|v2_tx_mod|v2_iobits);
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self_base->get_iface()->set_gpio_ddr(dboard_iface::UNIT_RX, RX_PUP_5V|RX_PUP_3V|ADF435X_CE|RXBB_PDB|ADF435X_PDBRF|RX_ATTN_MASK);
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//setup ATR for the mixer enables (always enabled to prevent phase slip between bursts)
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_IDLE, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_RX_ONLY, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_TX_ONLY, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_TX, dboard_iface::ATR_REG_FULL_DUPLEX, v2_tx_mod, TX_MIXER_DIS | v2_tx_mod);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_IDLE, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_TX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_RX_ONLY, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
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self_base->get_iface()->set_atr_reg(dboard_iface::UNIT_RX, dboard_iface::ATR_REG_FULL_DUPLEX, RX_MIXER_ENB, RX_MIXER_DIS | RX_MIXER_ENB);
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}
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wbx_base::wbx_version2::~wbx_version2(void){
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/* NOP */
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}
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/***********************************************************************
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* Enables
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**********************************************************************/
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void wbx_base::wbx_version2::set_tx_enabled(bool enb){
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self_base->get_iface()->set_gpio_out(dboard_iface::UNIT_TX,
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(enb)? TX_POWER_UP | ADF435X_CE : TX_POWER_DOWN, TX_POWER_UP | TX_POWER_DOWN | ADF435X_CE);
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}
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/***********************************************************************
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* Gain Handling
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**********************************************************************/
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double wbx_base::wbx_version2::set_tx_gain(double gain, const std::string &name){
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assert_has(wbx_v2_tx_gain_ranges.keys(), name, "wbx tx gain name");
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if(name == "PGA0"){
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double dac_volts = tx_pga0_gain_to_dac_volts(gain);
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self_base->_tx_gains[name] = gain;
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//write the new voltage to the aux dac
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self_base->get_iface()->write_aux_dac(dboard_iface::UNIT_TX, dboard_iface::AUX_DAC_A, dac_volts);
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}
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else UHD_THROW_INVALID_CODE_PATH();
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return self_base->_tx_gains[name]; //shadowed
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}
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/***********************************************************************
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* Tuning
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**********************************************************************/
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double wbx_base::wbx_version2::set_lo_freq(dboard_iface::unit_t unit, double target_freq) {
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//clip to tuning range
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target_freq = wbx_v2_freq_range.clip(target_freq);
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UHD_LOGV(often) << boost::format(
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"WBX tune: target frequency %f Mhz"
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) % (target_freq/1e6) << std::endl;
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/*
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* If the user sets 'mode_n=integer' in the tuning args, the user wishes to
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* tune in Integer-N mode, which can result in better spur
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* performance on some mixers. The default is fractional tuning.
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*/
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property_tree::sptr subtree = (unit == dboard_iface::UNIT_RX) ? self_base->get_rx_subtree()
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: self_base->get_tx_subtree();
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device_addr_t tune_args = subtree->access<device_addr_t>("tune_args").get();
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bool is_int_n = boost::iequals(tune_args.get("mode_n",""), "integer");
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//map prescaler setting to mininmum integer divider (N) values (pg.18 prescaler)
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static const uhd::dict<int, int> prescaler_to_min_int_div = map_list_of
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(0,23) //adf4350_regs_t::PRESCALER_4_5
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(1,75) //adf4350_regs_t::PRESCALER_8_9
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;
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//map rf divider select output dividers to enums
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static const uhd::dict<int, adf4350_regs_t::rf_divider_select_t> rfdivsel_to_enum = map_list_of
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(1, adf4350_regs_t::RF_DIVIDER_SELECT_DIV1)
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(2, adf4350_regs_t::RF_DIVIDER_SELECT_DIV2)
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(4, adf4350_regs_t::RF_DIVIDER_SELECT_DIV4)
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(8, adf4350_regs_t::RF_DIVIDER_SELECT_DIV8)
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(16, adf4350_regs_t::RF_DIVIDER_SELECT_DIV16)
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;
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double reference_freq = self_base->get_iface()->get_clock_rate(unit);
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//The mixer has a divide-by-2 stage on the LO port so the synthesizer
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//frequency must 2x the target frequency
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double synth_target_freq = target_freq * 2;
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//TODO: Document why the following has to be true
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bool div_resync_enabled = (target_freq > reference_freq);
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adf4350_regs_t::prescaler_t prescaler =
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synth_target_freq > 3e9 ? adf4350_regs_t::PRESCALER_8_9 : adf4350_regs_t::PRESCALER_4_5;
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adf435x_tuning_constraints tuning_constraints;
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tuning_constraints.force_frac0 = is_int_n;
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tuning_constraints.band_sel_freq_max = 100e3;
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tuning_constraints.ref_doubler_threshold = 12.5e6;
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tuning_constraints.int_range = uhd::range_t(prescaler_to_min_int_div[prescaler], 4095);
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tuning_constraints.pfd_freq_max = 25e6;
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tuning_constraints.rf_divider_range = uhd::range_t(1, 16);
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//When divider resync is enabled, a 180 deg phase error is introduced when syncing
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//multiple WBX boards. Switching to fundamental mode works arounds this issue.
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tuning_constraints.feedback_after_divider = div_resync_enabled;
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double synth_actual_freq = 0;
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adf435x_tuning_settings tuning_settings = tune_adf435x_synth(
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synth_target_freq, reference_freq, tuning_constraints, synth_actual_freq);
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//The mixer has a divide-by-2 stage on the LO port so the synthesizer
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//actual_freq must /2 the synth_actual_freq
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double actual_freq = synth_actual_freq / 2;
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//load the register values
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adf4350_regs_t regs;
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if (unit == dboard_iface::UNIT_RX)
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regs.output_power = (actual_freq == wbx_rx_lo_5dbm.clip(actual_freq)) ? adf4350_regs_t::OUTPUT_POWER_5DBM
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: adf4350_regs_t::OUTPUT_POWER_2DBM;
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else
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regs.output_power = (actual_freq == wbx_tx_lo_5dbm.clip(actual_freq)) ? adf4350_regs_t::OUTPUT_POWER_5DBM
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: adf4350_regs_t::OUTPUT_POWER_M1DBM;
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regs.frac_12_bit = tuning_settings.frac_12_bit;
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regs.int_16_bit = tuning_settings.int_16_bit;
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regs.mod_12_bit = tuning_settings.mod_12_bit;
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regs.clock_divider_12_bit = tuning_settings.clock_divider_12_bit;
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regs.feedback_select = tuning_constraints.feedback_after_divider ?
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adf4350_regs_t::FEEDBACK_SELECT_DIVIDED :
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adf4350_regs_t::FEEDBACK_SELECT_FUNDAMENTAL;
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regs.clock_div_mode = div_resync_enabled ?
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adf4350_regs_t::CLOCK_DIV_MODE_RESYNC_ENABLE :
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adf4350_regs_t::CLOCK_DIV_MODE_FAST_LOCK;
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regs.prescaler = prescaler;
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regs.r_counter_10_bit = tuning_settings.r_counter_10_bit;
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regs.reference_divide_by_2 = tuning_settings.r_divide_by_2_en ?
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adf4350_regs_t::REFERENCE_DIVIDE_BY_2_ENABLED :
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adf4350_regs_t::REFERENCE_DIVIDE_BY_2_DISABLED;
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regs.reference_doubler = tuning_settings.r_doubler_en ?
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adf4350_regs_t::REFERENCE_DOUBLER_ENABLED :
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adf4350_regs_t::REFERENCE_DOUBLER_DISABLED;
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regs.band_select_clock_div = tuning_settings.band_select_clock_div;
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UHD_ASSERT_THROW(rfdivsel_to_enum.has_key(tuning_settings.rf_divider));
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regs.rf_divider_select = rfdivsel_to_enum[tuning_settings.rf_divider];
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regs.ldf = is_int_n ?
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adf4350_regs_t::LDF_INT_N :
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adf4350_regs_t::LDF_FRAC_N;
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//reset the N and R counter
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regs.counter_reset = adf4350_regs_t::COUNTER_RESET_ENABLED;
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self_base->get_iface()->write_spi(unit, spi_config_t::EDGE_RISE, regs.get_reg(2), 32);
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regs.counter_reset = adf4350_regs_t::COUNTER_RESET_DISABLED;
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//write the registers
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//correct power-up sequence to write registers (5, 4, 3, 2, 1, 0)
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int addr;
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for(addr=5; addr>=0; addr--){
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UHD_LOGV(often) << boost::format(
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"WBX SPI Reg (0x%02x): 0x%08x"
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) % addr % regs.get_reg(addr) << std::endl;
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self_base->get_iface()->write_spi(
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unit, spi_config_t::EDGE_RISE,
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regs.get_reg(addr), 32
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);
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}
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//return the actual frequency
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UHD_LOGV(often) << boost::format(
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"WBX tune: actual frequency %f Mhz"
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) % (actual_freq/1e6) << std::endl;
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return actual_freq;
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}
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