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https://github.com/saymrwulf/uhd.git
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256 lines
9.7 KiB
C++
256 lines
9.7 KiB
C++
//
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// Copyright 2013 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include <uhd/transport/nirio/niusrprio_session.h>
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#include <uhd/transport/nirio/nirio_fifo.h>
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#include <uhd/transport/nirio/status.h>
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#include <boost/format.hpp>
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#include <boost/algorithm/string.hpp>
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#include <boost/lexical_cast.hpp>
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#include <stdio.h>
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#include <fstream>
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//@TODO: Move the register defs required by the class to a common location
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#include "../../usrp/x300/x300_regs.hpp"
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namespace uhd { namespace niusrprio {
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niusrprio_session::niusrprio_session(const std::string& resource_name, const std::string& rpc_port_name) :
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_resource_name(resource_name),
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_session_open(false),
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_resource_manager(_riok_proxy),
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_rpc_client("localhost", rpc_port_name)
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{
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}
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niusrprio_session::~niusrprio_session()
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{
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close();
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}
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nirio_status niusrprio_session::enumerate(const std::string& rpc_port_name, device_info_vtr& device_info_vtr)
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{
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usrprio_rpc::usrprio_rpc_client temp_rpc_client("localhost", rpc_port_name);
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nirio_status status = temp_rpc_client.get_ctor_status();
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nirio_status_chain(temp_rpc_client.niusrprio_enumerate(device_info_vtr), status);
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return status;
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}
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nirio_status niusrprio_session::open(
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nifpga_lvbitx::sptr lvbitx,
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bool force_download)
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{
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boost::unique_lock<boost::recursive_mutex> lock(_session_mutex);
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_lvbitx = lvbitx;
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nirio_status status = NiRio_Status_Success;
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std::string bitfile_path(_lvbitx->get_bitfile_path());
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std::string signature(_lvbitx->get_signature());
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//Make sure that the RPC client connected to the server properly
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nirio_status_chain(_rpc_client.get_ctor_status(), status);
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//Get a handle to the kernel driver
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nirio_status_chain(_rpc_client.niusrprio_get_interface_path(_resource_name, _interface_path), status);
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nirio_status_chain(_riok_proxy.open(_interface_path), status);
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if (nirio_status_not_fatal(status)) {
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//Bitfile build for a particular LVFPGA interface will have the same signature
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//because the API of the bitfile does not change. Two files with the same signature
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//can however have different bitstreams because of non-LVFPGA code differences.
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//That is why we need another identifier to qualify the signature. The BIN
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//checksum is a good candidate.
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std::string lvbitx_checksum(_lvbitx->get_bitstream_checksum());
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boost::uint16_t download_fpga = (force_download || (_read_bitstream_checksum() != lvbitx_checksum)) ? 1 : 0;
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nirio_status_chain(_ensure_fpga_ready(), status);
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nirio_status_chain(_rpc_client.niusrprio_open_session(
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_resource_name, bitfile_path, signature, download_fpga), status);
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_session_open = nirio_status_not_fatal(status);
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if (nirio_status_not_fatal(status)) {
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nirio_register_info_vtr reg_vtr;
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nirio_fifo_info_vtr fifo_vtr;
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_lvbitx->init_register_info(reg_vtr);
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_lvbitx->init_fifo_info(fifo_vtr);
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_resource_manager.initialize(reg_vtr, fifo_vtr);
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nirio_status_chain(_verify_signature(), status);
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nirio_status_chain(_write_bitstream_checksum(lvbitx_checksum), status);
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}
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}
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return status;
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}
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void niusrprio_session::close(bool skip_reset)
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{
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boost::unique_lock<boost::recursive_mutex> lock(_session_mutex);
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if (_session_open) {
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nirio_status status = NiRio_Status_Success;
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if (!skip_reset) reset();
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nirio_status_chain(_rpc_client.niusrprio_close_session(_resource_name), status);
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_session_open = false;
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}
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}
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nirio_status niusrprio_session::reset()
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{
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boost::unique_lock<boost::recursive_mutex> lock(_session_mutex);
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return _rpc_client.niusrprio_reset_device(_resource_name);
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}
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nirio_status niusrprio_session::download_bitstream_to_flash(const std::string& bitstream_path)
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{
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boost::unique_lock<boost::recursive_mutex> lock(_session_mutex);
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return _rpc_client.niusrprio_download_fpga_to_flash(_resource_name, bitstream_path);
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}
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niriok_proxy::sptr niusrprio_session::create_kernel_proxy(
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const std::string& resource_name,
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const std::string& rpc_port_name)
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{
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usrprio_rpc::usrprio_rpc_client temp_rpc_client("localhost", rpc_port_name);
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nirio_status status = temp_rpc_client.get_ctor_status();
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std::string interface_path;
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nirio_status_chain(temp_rpc_client.niusrprio_get_interface_path(resource_name, interface_path), status);
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niriok_proxy::sptr proxy;
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if (nirio_status_not_fatal(status)) {
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proxy.reset(new niriok_proxy());
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if (proxy) nirio_status_chain(proxy->open(interface_path), status);
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}
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return proxy;
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}
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nirio_status niusrprio_session::_verify_signature()
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{
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//Validate the signature using the kernel proxy
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nirio_status status = NiRio_Status_Success;
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boost::uint32_t sig_offset = 0;
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nirio_status_chain(_riok_proxy.get_attribute(DEFAULT_FPGA_SIGNATURE_OFFSET, sig_offset), status);
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niriok_scoped_addr_space(_riok_proxy, FPGA, status);
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std::string signature;
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for (boost::uint32_t i = 0; i < 8; i++) {
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boost::uint32_t quarter_sig;
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nirio_status_chain(_riok_proxy.peek(sig_offset, quarter_sig), status);
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signature += boost::str(boost::format("%08x") % quarter_sig);
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}
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std::string expected_signature(_lvbitx->get_signature());
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boost::to_upper(signature);
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boost::to_upper(expected_signature);
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if (signature.find(expected_signature) == std::string::npos) {
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nirio_status_chain(NiRio_Status_SignatureMismatch, status);
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}
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return status;
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}
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std::string niusrprio_session::_read_bitstream_checksum()
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{
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nirio_status status = NiRio_Status_Success;
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niriok_scoped_addr_space(_riok_proxy, BUS_INTERFACE, status);
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std::string usr_signature;
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for (boost::uint32_t i = 0; i < FPGA_USR_SIG_REG_SIZE; i+=4) {
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boost::uint32_t quarter_sig;
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nirio_status_chain(_riok_proxy.peek(FPGA_USR_SIG_REG_BASE + i, quarter_sig), status);
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usr_signature += boost::str(boost::format("%08x") % quarter_sig);
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}
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boost::to_upper(usr_signature);
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return usr_signature;
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}
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nirio_status niusrprio_session::_write_bitstream_checksum(const std::string& checksum)
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{
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nirio_status status = NiRio_Status_Success;
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niriok_scoped_addr_space(_riok_proxy, BUS_INTERFACE, status);
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for (boost::uint32_t i = 0; i < FPGA_USR_SIG_REG_SIZE; i+=4) {
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boost::uint32_t quarter_sig;
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try {
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std::stringstream ss;
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ss << std::hex << checksum.substr(i*2,8);
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ss >> quarter_sig;
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} catch (std::exception&) {
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quarter_sig = 0;
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}
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nirio_status_chain(_riok_proxy.poke(FPGA_USR_SIG_REG_BASE + i, quarter_sig), status);
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}
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return status;
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}
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nirio_status niusrprio_session::_ensure_fpga_ready()
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{
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nirio_status status = NiRio_Status_Success;
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niriok_scoped_addr_space(_riok_proxy, BUS_INTERFACE, status);
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//Verify that the Ettus FPGA loaded in the device. This may not be true if the
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//user is switching to UHD after using LabVIEW FPGA. In that case skip this check.
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boost::uint32_t pcie_fpga_signature = 0;
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nirio_status_chain(_riok_proxy.peek(FPGA_PCIE_SIG_REG, pcie_fpga_signature), status);
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//@TODO: Remove X300 specific constants for future products
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if (pcie_fpga_signature != FPGA_X3xx_SIG_VALUE) {
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return status;
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}
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boost::uint32_t reg_data = 0xffffffff;
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nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
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if (nirio_status_not_fatal(status) && (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK))
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{
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//In case this session was re-initialized *immediately* after the previous
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//there is a small chance that the server is still finishing up cleaning up
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//the DMA FIFOs. We currently don't have any feedback from the driver regarding
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//this state so just wait.
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boost::this_thread::sleep(boost::posix_time::milliseconds(FPGA_READY_TIMEOUT_IN_MS));
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//Disable all FIFOs in the FPGA
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for (size_t i = 0; i < _lvbitx->get_input_fifo_count(); i++) {
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_riok_proxy.poke(PCIE_RX_DMA_REG(DMA_CTRL_STATUS_REG, i), DMA_CTRL_DISABLED);
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}
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for (size_t i = 0; i < _lvbitx->get_output_fifo_count(); i++) {
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_riok_proxy.poke(PCIE_TX_DMA_REG(DMA_CTRL_STATUS_REG, i), DMA_CTRL_DISABLED);
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}
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//Disable all FIFOs in the kernel driver
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_riok_proxy.stop_all_fifos();
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boost::posix_time::ptime start_time = boost::posix_time::microsec_clock::local_time();
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boost::posix_time::time_duration elapsed;
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do {
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boost::this_thread::sleep(boost::posix_time::milliseconds(10)); //Avoid flooding the bus
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elapsed = boost::posix_time::microsec_clock::local_time() - start_time;
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nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
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} while (
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nirio_status_not_fatal(status) &&
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(reg_data & FPGA_STATUS_DMA_ACTIVE_MASK) &&
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elapsed.total_milliseconds() < FPGA_READY_TIMEOUT_IN_MS);
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nirio_status_chain(_riok_proxy.peek(FPGA_STATUS_REG, reg_data), status);
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if (nirio_status_not_fatal(status) && (reg_data & FPGA_STATUS_DMA_ACTIVE_MASK)) {
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return NiRio_Status_FifoReserved;
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}
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}
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return status;
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}
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}}
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