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100 lines
3.3 KiB
Text
100 lines
3.3 KiB
Text
/*! \page page_usrp1 USRP1
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\tableofcontents
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\section usrp1_features Comparative features list
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- Hardware Capabilities:
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- 2 transceiver card slots
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- 64 MHz fixed clock rate
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- FPGA Capabilities:
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- 2 RX DDC chains in FPGA
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- 2 TX DUC chains in FPGA (no TX CORDIC -\> uses DAC)
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- sc16 sample modes - RX & TX
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- Up to 8 MHz of RF BW with 16-bit samples
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- sc8 sample mode - RX only
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- Up to 16 MHz of RF BW with 8-bit samples
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\section usrp1_imgs Specify a Non-standard Image
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The standard USRP1 images installer comes with two FPGA images:
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- **usrp1_fpga.rbf:** 2 DDCs + 2 DUCs
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- **usrp1_fpga_4rx.rbf:** 4 DDCs + 0 DUCs
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By default, the USRP1 uses the FPGA image with 2 DDCs and 2 DUCs.
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However, a device address parameter can be used to override the FPGA
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image selection to use an alternate or a custom FPGA image. See the
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images application notes for installing custom images.
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Example device address string representations to specify non-standard
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firmware and/or FPGA images:
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fpga=usrp1_fpga_4rx.rbf
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-- OR --
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fw=usrp1_fw_custom.ihx
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-- OR --
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fpga=usrp1_fpga_4rx.rbf, fw=usrp1_fw_custom.ihx
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\section usrp1_emul Missing and Emulated Features
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The USRP1 FPGA does not have the necessary space to support the advanced
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streaming capabilities that are possible with the newer USRP devices.
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Some of these features are emulated in software to support the API.
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\subsection usrp1_emul_list List of emulated features
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- Setting the current device time
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- Getting the current device time
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- Transmitting at a specific time
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- Transmitting a specific number of samples
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- Receiving at a specific time
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- Receiving a specific number of samples
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- End of burst flags for transmit/receive
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- Notification on late stream command
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- Notification on late transmit packet
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- Notification on underflow or overflow
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- Notification on broken chain error
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<b>Note:</b> These emulated features rely on the host system's clock for
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timed operations and therefore may not have sufficient precision for the
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application.
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\subsection usrp1_emul_listmissing List of missing features
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- Start of burst flags for transmit/receive
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\section usrp1_hw Hardware Setup Notes
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\subsection usrp1_hw_extclk External clock modification
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The USRP device can be modified to accept an external clock reference instead of the 64MHz onboard reference.
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- Solder SMA (**LTI-SASF54GT**) connector to **J2001**.
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- Move 0 ohm 0603 resistor **R2029** to **R2030**.
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- Move 0.01uF 0603 capacitor **C925** to **C926**.
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- Remove 0.01uF 0603 capacitor **C924**.
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The new external clock needs to be a square wave between +7dBm and +15dBm.
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After the hardware modification, the user should burn the setting into
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the EEPROM, so UHD software can initialize with the correct clock rate.
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Run the following commands to record the setting into the EEPROM:
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cd <install-path>/lib/uhd/utils
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./usrp_burn_mb_eeprom --args=<optional device args> --values="mcr=<rate>"
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The user may override the clock rate specified in the EEPROM by using a
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device address. Example:
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uhd_usrp_probe --args="mcr=52e6"
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\section usrp1_known_issues Known Issues
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- When using the `_4rx` image, the example `rx_sample_to_file` will fail
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because it makes certain assumptions which are then no longer met.
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*/
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// vim:ft=doxygen:
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