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ae5211d71d
All copyright is now attributed to "Ettus Research, a National Instruments company". SPDX headers were also updated to latest version 3.0.
141 lines
4.3 KiB
C++
141 lines
4.3 KiB
C++
//
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// Copyright 2013 Ettus Research LLC
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// Copyright 2018 Ettus Research, a National Instruments Company
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//
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// Original ADF4001 driver written by: bistromath
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// Mar 1, 2013
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//
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// Re-used and re-licensed with permission.
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//
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// SPDX-License-Identifier: GPL-3.0-or-later
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//
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#include "adf4001_ctrl.hpp"
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#include <uhd/utils/log.hpp>
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#include <iostream>
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#include <iomanip>
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using namespace uhd;
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using namespace uhd::usrp;
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adf4001_regs_t::adf4001_regs_t(void) {
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ref_counter = 0;
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n = 0;
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charge_pump_current_1 = 0;
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charge_pump_current_2 = 0;
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anti_backlash_width = ANTI_BACKLASH_WIDTH_2_9NS;
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lock_detect_precision = LOCK_DETECT_PRECISION_3CYC;
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charge_pump_gain = CHARGE_PUMP_GAIN_1;
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counter_reset = COUNTER_RESET_NORMAL;
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power_down = POWER_DOWN_NORMAL;
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muxout = MUXOUT_TRISTATE_OUT;
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phase_detector_polarity = PHASE_DETECTOR_POLARITY_NEGATIVE;
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charge_pump_mode = CHARGE_PUMP_TRISTATE;
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fastlock_mode = FASTLOCK_MODE_DISABLED;
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timer_counter_control = TIMEOUT_3CYC;
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}
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uint32_t adf4001_regs_t::get_reg(uint8_t addr) {
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uint32_t reg = 0;
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switch (addr) {
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case 0:
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reg |= (uint32_t(ref_counter) & 0x003FFF) << 2;
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reg |= (uint32_t(anti_backlash_width) & 0x000003) << 16;
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reg |= (uint32_t(lock_detect_precision) & 0x000001) << 20;
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break;
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case 1:
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reg |= (uint32_t(n) & 0x001FFF) << 8;
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reg |= (uint32_t(charge_pump_gain) & 0x000001) << 21;
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break;
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case 2:
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reg |= (uint32_t(counter_reset) & 0x000001) << 2;
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reg |= (uint32_t(power_down) & 0x000001) << 3;
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reg |= (uint32_t(muxout) & 0x000007) << 4;
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reg |= (uint32_t(phase_detector_polarity) & 0x000001) << 7;
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reg |= (uint32_t(charge_pump_mode) & 0x000001) << 8;
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reg |= (uint32_t(fastlock_mode) & 0x000003) << 9;
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reg |= (uint32_t(timer_counter_control) & 0x00000F) << 11;
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reg |= (uint32_t(charge_pump_current_1) & 0x000007) << 15;
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reg |= (uint32_t(charge_pump_current_2) & 0x000007) << 18;
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reg |= (uint32_t(power_down) & 0x000002) << 21;
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break;
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case 3:
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reg |= (uint32_t(counter_reset) & 0x000001) << 2;
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reg |= (uint32_t(power_down) & 0x000001) << 3;
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reg |= (uint32_t(muxout) & 0x000007) << 4;
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reg |= (uint32_t(phase_detector_polarity) & 0x000001) << 7;
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reg |= (uint32_t(charge_pump_mode) & 0x000001) << 8;
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reg |= (uint32_t(fastlock_mode) & 0x000003) << 9;
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reg |= (uint32_t(timer_counter_control) & 0x00000F) << 11;
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reg |= (uint32_t(charge_pump_current_1) & 0x000007) << 15;
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reg |= (uint32_t(charge_pump_current_2) & 0x000007) << 18;
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reg |= (uint32_t(power_down) & 0x000002) << 20;
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break;
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default:
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break;
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}
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reg |= (uint32_t(addr) & 0x03);
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return reg;
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}
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adf4001_ctrl::adf4001_ctrl(uhd::spi_iface::sptr _spi, int slaveno):
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spi_iface(_spi),
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slaveno(slaveno)
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{
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spi_config.mosi_edge = spi_config_t::EDGE_RISE;
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//set defaults
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adf4001_regs.ref_counter = 1;
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adf4001_regs.n = 4;
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adf4001_regs.charge_pump_current_1 = 7;
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adf4001_regs.charge_pump_current_2 = 7;
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adf4001_regs.muxout = adf4001_regs_t::MUXOUT_DLD;
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adf4001_regs.counter_reset = adf4001_regs_t::COUNTER_RESET_NORMAL;
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adf4001_regs.phase_detector_polarity = adf4001_regs_t::PHASE_DETECTOR_POLARITY_POSITIVE;
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adf4001_regs.charge_pump_mode = adf4001_regs_t::CHARGE_PUMP_TRISTATE;
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//everything else should be defaults
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program_regs();
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}
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void adf4001_ctrl::set_lock_to_ext_ref(bool external) {
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if(external) {
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adf4001_regs.charge_pump_mode = adf4001_regs_t::CHARGE_PUMP_NORMAL;
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} else {
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adf4001_regs.charge_pump_mode = adf4001_regs_t::CHARGE_PUMP_TRISTATE;
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}
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program_regs();
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}
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void adf4001_ctrl::program_regs(void) {
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//no control over CE, only LE, therefore we use the initialization latch method
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write_reg(3);
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//conduct a function latch (2)
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write_reg(2);
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//write R counter latch (0)
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write_reg(0);
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//write N counter latch (1)
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write_reg(1);
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}
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void adf4001_ctrl::write_reg(uint8_t addr) {
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uint32_t reg = adf4001_regs.get_reg(addr); //load the reg data
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spi_iface->transact_spi(slaveno,
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spi_config,
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reg,
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24,
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false);
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}
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