mirror of
https://github.com/saymrwulf/uhd.git
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359 lines
12 KiB
C++
359 lines
12 KiB
C++
//
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// Copyright 2010-2012,2015,2016 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include "gpio_core_200.hpp"
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#include <uhd/types/serial.hpp>
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#include "clock_ctrl.hpp"
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#include "usrp2_regs.hpp" //wishbone address constants
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#include "usrp2_fifo_ctrl.hpp"
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#include <uhd/usrp/dboard_iface.hpp>
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#include <uhd/types/dict.hpp>
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#include <uhd/exception.hpp>
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#include <uhd/utils/algorithm.hpp>
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#include <boost/assign/list_of.hpp>
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#include <boost/asio.hpp> //htonl and ntohl
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#include <boost/math/special_functions/round.hpp>
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#include "ad7922_regs.hpp" //aux adc
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#include "ad5623_regs.hpp" //aux dac
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using namespace uhd;
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using namespace uhd::usrp;
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using namespace boost::assign;
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class usrp2_dboard_iface : public dboard_iface{
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public:
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usrp2_dboard_iface(
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timed_wb_iface::sptr wb_iface,
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uhd::i2c_iface::sptr i2c_iface,
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uhd::spi_iface::sptr spi_iface,
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usrp2_clock_ctrl::sptr clock_ctrl
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);
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~usrp2_dboard_iface(void);
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special_props_t get_special_props(void){
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special_props_t props;
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props.soft_clock_divider = false;
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props.mangle_i2c_addrs = false;
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return props;
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}
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void write_aux_dac(unit_t, aux_dac_t, double);
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double read_aux_adc(unit_t, aux_adc_t);
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void set_pin_ctrl(unit_t unit, uint32_t value, uint32_t mask = 0xffffffff);
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uint32_t get_pin_ctrl(unit_t unit);
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void set_atr_reg(unit_t unit, atr_reg_t reg, uint32_t value, uint32_t mask = 0xffffffff);
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uint32_t get_atr_reg(unit_t unit, atr_reg_t reg);
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void set_gpio_ddr(unit_t unit, uint32_t value, uint32_t mask = 0xffffffff);
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uint32_t get_gpio_ddr(unit_t unit);
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void set_gpio_out(unit_t unit, uint32_t value, uint32_t mask = 0xffffffff);
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uint32_t get_gpio_out(unit_t unit);
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uint32_t read_gpio(unit_t unit);
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void set_command_time(const uhd::time_spec_t& t);
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uhd::time_spec_t get_command_time(void);
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void write_i2c(uint16_t, const byte_vector_t &);
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byte_vector_t read_i2c(uint16_t, size_t);
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void set_clock_rate(unit_t, double);
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double get_clock_rate(unit_t);
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std::vector<double> get_clock_rates(unit_t);
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void set_clock_enabled(unit_t, bool);
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double get_codec_rate(unit_t);
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void set_fe_connection(unit_t unit, const std::string&, const fe_connection_t& fe_conn);
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void write_spi(
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unit_t unit,
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const spi_config_t &config,
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uint32_t data,
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size_t num_bits
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);
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uint32_t read_write_spi(
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unit_t unit,
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const spi_config_t &config,
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uint32_t data,
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size_t num_bits
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);
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private:
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timed_wb_iface::sptr _wb_iface;
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uhd::i2c_iface::sptr _i2c_iface;
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uhd::spi_iface::sptr _spi_iface;
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usrp2_clock_ctrl::sptr _clock_ctrl;
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gpio_core_200::sptr _gpio;
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uhd::dict<unit_t, ad5623_regs_t> _dac_regs;
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uhd::dict<unit_t, double> _clock_rates;
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void _write_aux_dac(unit_t);
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};
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/***********************************************************************
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* Make Function
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**********************************************************************/
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dboard_iface::sptr make_usrp2_dboard_iface(
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timed_wb_iface::sptr wb_iface,
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uhd::i2c_iface::sptr i2c_iface,
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uhd::spi_iface::sptr spi_iface,
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usrp2_clock_ctrl::sptr clock_ctrl
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){
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return dboard_iface::sptr(new usrp2_dboard_iface(wb_iface, i2c_iface, spi_iface, clock_ctrl));
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}
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/***********************************************************************
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* Structors
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**********************************************************************/
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usrp2_dboard_iface::usrp2_dboard_iface(
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timed_wb_iface::sptr wb_iface,
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uhd::i2c_iface::sptr i2c_iface,
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uhd::spi_iface::sptr spi_iface,
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usrp2_clock_ctrl::sptr clock_ctrl
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):
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_wb_iface(wb_iface),
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_i2c_iface(i2c_iface),
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_spi_iface(spi_iface),
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_clock_ctrl(clock_ctrl)
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{
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_gpio = gpio_core_200::make(wb_iface, U2_REG_SR_ADDR(SR_GPIO), U2_REG_GPIO_RB);
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//reset the aux dacs
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_dac_regs[UNIT_RX] = ad5623_regs_t();
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_dac_regs[UNIT_TX] = ad5623_regs_t();
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BOOST_FOREACH(unit_t unit, _dac_regs.keys()){
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_dac_regs[unit].data = 1;
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_dac_regs[unit].addr = ad5623_regs_t::ADDR_ALL;
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_dac_regs[unit].cmd = ad5623_regs_t::CMD_RESET;
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this->_write_aux_dac(unit);
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}
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//init the clock rate shadows with max rate clock
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this->set_clock_rate(UNIT_RX, sorted(this->get_clock_rates(UNIT_RX)).back());
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this->set_clock_rate(UNIT_TX, sorted(this->get_clock_rates(UNIT_TX)).back());
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}
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usrp2_dboard_iface::~usrp2_dboard_iface(void){
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/* NOP */
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}
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/***********************************************************************
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* Clocks
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**********************************************************************/
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void usrp2_dboard_iface::set_clock_rate(unit_t unit, double rate){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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_clock_rates[unit] = rate; //set to shadow
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switch(unit){
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case UNIT_RX: _clock_ctrl->set_rate_rx_dboard_clock(rate); return;
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case UNIT_TX: _clock_ctrl->set_rate_tx_dboard_clock(rate); return;
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default: UHD_THROW_INVALID_CODE_PATH();
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}
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}
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double usrp2_dboard_iface::get_clock_rate(unit_t unit){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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return _clock_rates[unit]; //get from shadow
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}
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std::vector<double> usrp2_dboard_iface::get_clock_rates(unit_t unit){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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switch(unit){
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case UNIT_RX: return _clock_ctrl->get_rates_rx_dboard_clock();
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case UNIT_TX: return _clock_ctrl->get_rates_tx_dboard_clock();
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default: UHD_THROW_INVALID_CODE_PATH();
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}
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}
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void usrp2_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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switch(unit){
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case UNIT_RX: _clock_ctrl->enable_rx_dboard_clock(enb); return;
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case UNIT_TX: _clock_ctrl->enable_tx_dboard_clock(enb); return;
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default: UHD_THROW_INVALID_CODE_PATH();
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}
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}
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double usrp2_dboard_iface::get_codec_rate(unit_t unit){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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return _clock_ctrl->get_master_clock_rate();
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}
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/***********************************************************************
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* GPIO
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**********************************************************************/
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void usrp2_dboard_iface::set_pin_ctrl(unit_t unit, uint32_t value, uint32_t mask){
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_gpio->set_pin_ctrl(unit, static_cast<uint16_t>(value), static_cast<uint16_t>(mask));
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}
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uint32_t usrp2_dboard_iface::get_pin_ctrl(unit_t unit){
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return static_cast<uint32_t>(_gpio->get_pin_ctrl(unit));
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}
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void usrp2_dboard_iface::set_atr_reg(unit_t unit, atr_reg_t reg, uint32_t value, uint32_t mask){
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_gpio->set_atr_reg(unit, reg, static_cast<uint16_t>(value), static_cast<uint16_t>(mask));
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}
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uint32_t usrp2_dboard_iface::get_atr_reg(unit_t unit, atr_reg_t reg){
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return static_cast<uint32_t>(_gpio->get_atr_reg(unit, reg));
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}
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void usrp2_dboard_iface::set_gpio_ddr(unit_t unit, uint32_t value, uint32_t mask){
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_gpio->set_gpio_ddr(unit, static_cast<uint16_t>(value), static_cast<uint16_t>(mask));
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}
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uint32_t usrp2_dboard_iface::get_gpio_ddr(unit_t unit){
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return static_cast<uint32_t>(_gpio->get_gpio_ddr(unit));
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}
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void usrp2_dboard_iface::set_gpio_out(unit_t unit, uint32_t value, uint32_t mask){
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_gpio->set_gpio_out(unit, static_cast<uint16_t>(value), static_cast<uint16_t>(mask));
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}
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uint32_t usrp2_dboard_iface::get_gpio_out(unit_t unit){
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return static_cast<uint32_t>(_gpio->get_gpio_out(unit));
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}
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uint32_t usrp2_dboard_iface::read_gpio(unit_t unit){
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return _gpio->read_gpio(unit);
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}
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/***********************************************************************
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* SPI
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**********************************************************************/
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static const uhd::dict<dboard_iface::unit_t, int> unit_to_spi_dev = map_list_of
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(dboard_iface::UNIT_TX, SPI_SS_TX_DB)
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(dboard_iface::UNIT_RX, SPI_SS_RX_DB)
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;
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void usrp2_dboard_iface::write_spi(
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unit_t unit,
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const spi_config_t &config,
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uint32_t data,
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size_t num_bits
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){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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_spi_iface->write_spi(unit_to_spi_dev[unit], config, data, num_bits);
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}
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uint32_t usrp2_dboard_iface::read_write_spi(
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unit_t unit,
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const spi_config_t &config,
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uint32_t data,
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size_t num_bits
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){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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return _spi_iface->read_spi(unit_to_spi_dev[unit], config, data, num_bits);
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}
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/***********************************************************************
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* I2C
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**********************************************************************/
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void usrp2_dboard_iface::write_i2c(uint16_t addr, const byte_vector_t &bytes){
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return _i2c_iface->write_i2c(addr, bytes);
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}
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byte_vector_t usrp2_dboard_iface::read_i2c(uint16_t addr, size_t num_bytes){
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return _i2c_iface->read_i2c(addr, num_bytes);
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}
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/***********************************************************************
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* Aux DAX/ADC
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**********************************************************************/
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void usrp2_dboard_iface::_write_aux_dac(unit_t unit){
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static const uhd::dict<unit_t, int> unit_to_spi_dac = map_list_of
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(UNIT_RX, SPI_SS_RX_DAC)
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(UNIT_TX, SPI_SS_TX_DAC)
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;
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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_spi_iface->write_spi(
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unit_to_spi_dac[unit], spi_config_t::EDGE_FALL,
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_dac_regs[unit].get_reg(), 24
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);
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}
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void usrp2_dboard_iface::write_aux_dac(unit_t unit, aux_dac_t which, double value){
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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_dac_regs[unit].data = boost::math::iround(4095*value/3.3);
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_dac_regs[unit].cmd = ad5623_regs_t::CMD_WR_UP_DAC_CHAN_N;
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typedef uhd::dict<aux_dac_t, ad5623_regs_t::addr_t> aux_dac_to_addr;
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static const uhd::dict<unit_t, aux_dac_to_addr> unit_to_which_to_addr = map_list_of
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(UNIT_RX, map_list_of
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(AUX_DAC_A, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_B, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_C, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_D, ad5623_regs_t::ADDR_DAC_B)
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)
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(UNIT_TX, map_list_of
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(AUX_DAC_A, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_B, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_C, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_D, ad5623_regs_t::ADDR_DAC_A)
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)
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;
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_dac_regs[unit].addr = unit_to_which_to_addr[unit][which];
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this->_write_aux_dac(unit);
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}
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double usrp2_dboard_iface::read_aux_adc(unit_t unit, aux_adc_t which){
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static const uhd::dict<unit_t, int> unit_to_spi_adc = map_list_of
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(UNIT_RX, SPI_SS_RX_ADC)
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(UNIT_TX, SPI_SS_TX_ADC)
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;
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if (unit == UNIT_BOTH) throw uhd::runtime_error("UNIT_BOTH not supported.");
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//setup spi config args
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spi_config_t config;
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config.mosi_edge = spi_config_t::EDGE_FALL;
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config.miso_edge = spi_config_t::EDGE_RISE;
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//setup the spi registers
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ad7922_regs_t ad7922_regs;
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switch(which){
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case AUX_ADC_A: ad7922_regs.mod = 0; break;
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case AUX_ADC_B: ad7922_regs.mod = 1; break;
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} ad7922_regs.chn = ad7922_regs.mod; //normal mode: mod == chn
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//write and read spi
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_spi_iface->write_spi(
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unit_to_spi_adc[unit], config,
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ad7922_regs.get_reg(), 16
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);
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ad7922_regs.set_reg(uint16_t(_spi_iface->read_spi(
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unit_to_spi_adc[unit], config,
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ad7922_regs.get_reg(), 16
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)));
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//convert to voltage and return
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return 3.3*ad7922_regs.result/4095;
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}
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uhd::time_spec_t usrp2_dboard_iface::get_command_time()
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{
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return _wb_iface->get_time();
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}
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void usrp2_dboard_iface::set_command_time(const uhd::time_spec_t& t)
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{
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_wb_iface->set_time(t);
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}
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void usrp2_dboard_iface::set_fe_connection(unit_t, const std::string&, const fe_connection_t&)
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{
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throw uhd::not_implemented_error("fe connection configuration support not implemented");
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}
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