mirror of
https://github.com/saymrwulf/uhd.git
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99c2730bc9
- Also removes all references to boost/cstdint.hpp and replaces it with stdint.h (The 'correct' replacement would be <cstdint>, but not all of our compilers support that).
266 lines
9.4 KiB
Python
266 lines
9.4 KiB
Python
#!/usr/bin/env python
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#
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# Copyright 2011-2012 Ettus Research LLC
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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#
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TMPL_HEADER = """
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<%
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import time
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%>
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/***********************************************************************
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* This file was generated by ${file} on ${time.strftime("%c")}
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**********************************************************************/
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#include "convert_common.hpp"
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#include <uhd/utils/byteswap.hpp>
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using namespace uhd::convert;
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// item32 -> item32: Just a memcpy. No scaling possible.
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DECLARE_CONVERTER(item32, 1, item32, 1, PRIORITY_GENERAL) {
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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memcpy(output, input, nsamps * sizeof(item32_t));
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}
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"""
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# Some 32-bit types converters are also defined in convert_item32.cpp to
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# take care of quirks such as I/Q ordering on the wire etc.
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TMPL_CONV_ITEM32 = """
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DECLARE_CONVERTER({in_type}, 1, {out_type}, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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for (size_t i = 0; i < nsamps; i++) {{
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output[i] = {to_wire_or_host}(input[i]);
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}}
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}}
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"""
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# 64-bit data types are two consecutive item32 items
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TMPL_CONV_ITEM64 = """
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DECLARE_CONVERTER({in_type}, 1, {out_type}, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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// An item64 is two item32_t's
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for (size_t i = 0; i < nsamps * 2; i++) {{
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output[i] = {to_wire_or_host}(input[i]);
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}}
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}}
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"""
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TMPL_CONV_U8S8 = """
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DECLARE_CONVERTER({us8}, 1, {us8}_item32_{end}, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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// 1) Copy all the 4-byte tuples
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size_t n_words = nsamps / 4;
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for (size_t i = 0; i < n_words; i++) {{
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output[i] = {to_wire}(input[i]);
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}}
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// 2) If nsamps was not a multiple of 4, copy the rest by hand
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size_t bytes_left = nsamps % 4;
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if (bytes_left) {{
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const {us8}_t *last_input_word = reinterpret_cast<const {us8}_t *>(&input[n_words]);
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{us8}_t *last_output_word = reinterpret_cast<{us8}_t *>(&output[n_words]);
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for (size_t k = 0; k < bytes_left; k++) {{
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last_output_word[k] = last_input_word[k];
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}}
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output[n_words] = {to_wire}(output[n_words]);
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}}
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}}
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DECLARE_CONVERTER({us8}_item32_{end}, 1, {us8}, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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// 1) Copy all the 4-byte tuples
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size_t n_words = nsamps / 4;
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for (size_t i = 0; i < n_words; i++) {{
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output[i] = {to_host}(input[i]);
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}}
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// 2) If nsamps was not a multiple of 4, copy the rest by hand
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size_t bytes_left = nsamps % 4;
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if (bytes_left) {{
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item32_t last_input_word = {to_host}(input[n_words]);
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const {us8}_t *last_input_word_ptr = reinterpret_cast<const {us8}_t *>(&last_input_word);
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{us8}_t *last_output_word = reinterpret_cast<{us8}_t *>(&output[n_words]);
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for (size_t k = 0; k < bytes_left; k++) {{
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last_output_word[k] = last_input_word_ptr[k];
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}}
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}}
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}}
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"""
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TMPL_CONV_S16 = """
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DECLARE_CONVERTER(s16, 1, s16_item32_{end}, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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// 1) Copy all the 4-byte tuples
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size_t n_words = nsamps / 2;
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for (size_t i = 0; i < n_words; i++) {{
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output[i] = {to_wire}(input[i]);
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}}
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// 2) If nsamps was not a multiple of 2, copy the last one by hand
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if (nsamps % 2) {{
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item32_t tmp = item32_t(*reinterpret_cast<const s16_t *>(&input[n_words]));
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output[n_words] = {to_wire}(tmp);
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}}
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}}
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DECLARE_CONVERTER(s16_item32_{end}, 1, s16, 1, PRIORITY_GENERAL) {{
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const item32_t *input = reinterpret_cast<const item32_t *>(inputs[0]);
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item32_t *output = reinterpret_cast<item32_t *>(outputs[0]);
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// 1) Copy all the 4-byte tuples
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size_t n_words = nsamps / 2;
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for (size_t i = 0; i < n_words; i++) {{
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output[i] = {to_host}(input[i]);
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}}
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// 2) If nsamps was not a multiple of 2, copy the last one by hand
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if (nsamps % 2) {{
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item32_t tmp = {to_host}(input[n_words]);
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*reinterpret_cast<s16_t *>(&output[n_words]) = s16_t(tmp);
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}}
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}}
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"""
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TMPL_CONV_USRP1_COMPLEX = """
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DECLARE_CONVERTER(${cpu_type}, ${width}, sc16_item16_usrp1, 1, PRIORITY_GENERAL){
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% for w in range(width):
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const ${cpu_type}_t *input${w} = reinterpret_cast<const ${cpu_type}_t *>(inputs[${w}]);
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% endfor
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uint16_t *output = reinterpret_cast<uint16_t *>(outputs[0]);
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for (size_t i = 0, j = 0; i < nsamps; i++){
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% for w in range(width):
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output[j++] = ${to_wire}(uint16_t(int16_t(input${w}[i].real()${do_scale})));
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output[j++] = ${to_wire}(uint16_t(int16_t(input${w}[i].imag()${do_scale})));
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% endfor
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}
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}
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DECLARE_CONVERTER(sc16_item16_usrp1, 1, ${cpu_type}, ${width}, PRIORITY_GENERAL){
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const uint16_t *input = reinterpret_cast<const uint16_t *>(inputs[0]);
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% for w in range(width):
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${cpu_type}_t *output${w} = reinterpret_cast<${cpu_type}_t *>(outputs[${w}]);
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% endfor
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for (size_t i = 0, j = 0; i < nsamps; i++){
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% for w in range(width):
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output${w}[i] = ${cpu_type}_t(
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int16_t(${to_host}(input[j+0]))${do_scale},
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int16_t(${to_host}(input[j+1]))${do_scale}
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);
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j += 2;
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% endfor
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}
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}
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DECLARE_CONVERTER(sc8_item16_usrp1, 1, ${cpu_type}, ${width}, PRIORITY_GENERAL){
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const uint16_t *input = reinterpret_cast<const uint16_t *>(inputs[0]);
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% for w in range(width):
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${cpu_type}_t *output${w} = reinterpret_cast<${cpu_type}_t *>(outputs[${w}]);
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% endfor
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for (size_t i = 0, j = 0; i < nsamps; i++){
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% for w in range(width):
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{
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const uint16_t num = ${to_host}(input[j++]);
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output${w}[i] = ${cpu_type}_t(
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int8_t(num)${do_scale},
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int8_t(num >> 8)${do_scale}
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);
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}
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% endfor
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}
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}
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"""
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def parse_tmpl(_tmpl_text, **kwargs):
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from mako.template import Template
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return Template(_tmpl_text).render(**kwargs)
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if __name__ == '__main__':
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import sys, os
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file = os.path.basename(__file__)
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output = parse_tmpl(TMPL_HEADER, file=file)
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## Generate all data types that are exactly
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## item32 or multiples thereof:
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for end in ('be', 'le'):
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host_to_wire = {'be': 'uhd::htonx', 'le': 'uhd::htowx'}[end]
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wire_to_host = {'be': 'uhd::ntohx', 'le': 'uhd::wtohx'}[end]
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# item32 types (sc16->sc16 is a special case because it defaults
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# to Q/I order on the wire:
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for in_type, out_type, to_wire_or_host in (
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('item32', 'sc16_item32_{end}', host_to_wire),
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('sc16_item32_{end}', 'item32', wire_to_host),
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('f32', 'f32_item32_{end}', host_to_wire),
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('f32_item32_{end}', 'f32', wire_to_host),
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):
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output += TMPL_CONV_ITEM32.format(
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end=end, to_wire_or_host=to_wire_or_host,
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in_type=in_type.format(end=end), out_type=out_type.format(end=end)
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)
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# 2xitem32 types:
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for in_type, out_type in (
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('fc32', 'fc32_item32_{end}'),
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('fc32_item32_{end}', 'fc32'),
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):
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output += TMPL_CONV_ITEM64.format(
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end=end, to_wire_or_host=to_wire_or_host,
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in_type=in_type.format(end=end), out_type=out_type.format(end=end)
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)
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## Real 16-Bit:
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for end, to_host, to_wire in (
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('be', 'uhd::ntohx', 'uhd::htonx'),
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('le', 'uhd::wtohx', 'uhd::htowx'),
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):
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output += TMPL_CONV_S16.format(
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end=end, to_host=to_host, to_wire=to_wire
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)
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## Real 8-Bit Types:
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for us8 in ('u8', 's8'):
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for end, to_host, to_wire in (
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('be', 'uhd::ntohx', 'uhd::htonx'),
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('le', 'uhd::wtohx', 'uhd::htowx'),
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):
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output += TMPL_CONV_U8S8.format(
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us8=us8, end=end, to_host=to_host, to_wire=to_wire
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)
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#generate complex converters for usrp1 format (requires Cheetah)
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for width in 1, 2, 4:
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for cpu_type, do_scale in (
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('fc64', '*scale_factor'),
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('fc32', '*float(scale_factor)'),
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('sc16', ''),
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):
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output += parse_tmpl(
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TMPL_CONV_USRP1_COMPLEX,
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width=width, to_host='uhd::wtohx', to_wire='uhd::htowx',
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cpu_type=cpu_type, do_scale=do_scale
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)
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open(sys.argv[1], 'w').write(output)
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