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136 lines
4.2 KiB
Text
136 lines
4.2 KiB
Text
/*! \page page_usrp_e1x0 USRP-E1x0 Series
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\tableofcontents
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\section e1x0_features Comparative features list
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- Hardware Capabilities:
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- 1 transceiver card slot
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- Internal PPS reference input
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- Internal 10 MHz reference input
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- Configurable clock rate (defaults to 64 MHz)
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- Internal GPSDO option
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- FPGA Capabilities:
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- 2 RX DDC chains in FPGA
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- 1 TX DUC chain in FPGA
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- Timed commands in FPGA
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- Timed sampling in FPGA
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- sc8 and sc16 sample modes
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- Up to 8 MHz of RF BW with 16-bit samples
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- Up to 16 MHz of RF BW with 8-bit samples
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\section e1x0_imgs Specify a Non-standard Image
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UHD software will automatically select the USRP-Embedded FPGA image from
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the installed images package. The FPGA image selection can be overridden
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with the `fpga` device address parameter.
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Example device address string representations to specify non-standard
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FPGA image:
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fpga=usrp_e100_custom.bin
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\section e1x0_mcr Changing the Master Clock Rate
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The master clock rate of the USRP-Embedded feeds both the FPGA DSP and
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the codec chip. Hundreds of rates between 32 MHz and 64 MHz are
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available. A few notable rates are:
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- **64 MHz:** maximum rate of the codec chip
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- **61.44 MHz:** good for UMTS/WCDMA applications
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- **52 MHz:** good for GSM applications
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\subsection e1x0_mcr_extvcxo Set 61.44MHz - uses external VCXO
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To use the 61.44 MHz clock rate with the USRP-Embedded, two jumpers must
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be moved on the device.
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- **J16** is a two pin header; remove the jumper (or leave it on pin1
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only).
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- **J15** is a three pin header; move the jumper to (pin1, pin2).
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**Note:** See instructions below to communicate the desired clock rate
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to UHD software.
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\subsection e1x0_intvco Set other rates - uses internal VCO
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To use other clock rates, the jumpers will need to be in the default
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position.
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- **J16** is a two pin header; move the jumper to (pin1, pin2).
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- **J15** is a three pin header; move the jumper to (pin2, pin3).
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To communicate the desired clock rate into UHD software, specify the a
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special device address argument, where the key is
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`master_clock_rate` and the value is a rate in Hz. Example:
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uhd_usrp_probe --args="master_clock_rate=52e6"
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\section e1x0_clksync Clock Synchronization
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\subsection e1x0_clksync_ref Ref Clock - 10MHz
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The E1xx has a 10MHz TCXO which can be used to discipline the flexible
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clocking by selecting `REF_INT` for the uhd::clock_config_t.
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Alternately, an external 10MHz reference clock can be supplied by
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soldering a connector.
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- Connector **J10** (REF_IN) needs MCX connector **WM5541-ND** or
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similar.
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- Square wave will offer the best phase noise performance, but
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sinusoid is acceptable.
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- **Power level:** 0 to 15dBm
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- Select `REF_SMA` in uhd::clock_config_t.
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\subsection e1x0_clksync_pps PPS - Pulse Per Second
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An external PPS signal for timestamp synchronization can be supplied by
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soldering a connector.
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- Connector **J13** (PPS) needs MCX connector **WM5541-ND** or
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similar.
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- Requires a square wave signal.
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- **Amplitude:** 3.3 to 5 Vpp
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Test the PPS input with the following app (`<args>` are device
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address arguments, optional if only one USRP device is on your machine):
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cd <install-path>/lib/uhd/examples
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./test_pps_input --args=<args>
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\subsection e1x0_clksync_gpsdo Internal GPSDO
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Please see the \subpage page_gpsdo for
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information on configuring and using the internal GPSDO.
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UHD software will always try to detect an installed GPSDO at runtime. It
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is not necessary to burn a special EEPROM value for GPSDO detection.
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\section e1x0_hw Hardware Setup Notes
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\subsection e1x0_hw_leds Front panel LEDs
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The LEDs on the front panel can be useful in debugging hardware and
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software issues. The LEDs reveal the following about the state of the
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device:
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- **LED A:** transmitting
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- **LED B:** PPS signal
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- **LED C:** receiving
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- **LED D:** FPGA loaded
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- **LED E:** reference lock
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- **LED F:** board power
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\section e1x0_misc Miscellaneous
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\subsection e1x0_misc_sensors Available Sensors
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The following sensors are available; they can be queried through the
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API.
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- **ref_locked:** clock reference locked (internal/external)
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- other sensors are added when the GPSDO is enabled
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*/
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// vim:ft=doxygen:
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