mirror of
https://github.com/saymrwulf/uhd.git
synced 2026-05-16 21:10:10 +00:00
db5ce31b0e
No functional changes whatsoever, only: - Move DioControl to its own module (x4xx_dio_control.py) - Where PyLint was complaining about whitespace issues, fix those - Fix import list in x4xx_periphs.py after removing DioControl - Fix import list in x4xx.py to import DioControl from the correct location
36 lines
1.5 KiB
CMake
36 lines
1.5 KiB
CMake
#
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# Copyright 2017-2019 Ettus Research, a National Instruments Company
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#
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# SPDX-License-Identifier: GPL-3.0-or-later
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#
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########################################################################
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# This file included, use CMake directory variables
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########################################################################
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set(USRP_MPM_FILES ${USRP_MPM_FILES})
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set(USRP_MPM_PERIPHMGR_FILES
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${CMAKE_CURRENT_SOURCE_DIR}/__init__.py.in
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${CMAKE_CURRENT_SOURCE_DIR}/base.py
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${CMAKE_CURRENT_SOURCE_DIR}/common.py
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${CMAKE_CURRENT_SOURCE_DIR}/n3xx.py
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${CMAKE_CURRENT_SOURCE_DIR}/n3xx_periphs.py
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${CMAKE_CURRENT_SOURCE_DIR}/e320.py
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${CMAKE_CURRENT_SOURCE_DIR}/e320_periphs.py
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${CMAKE_CURRENT_SOURCE_DIR}/e31x.py
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${CMAKE_CURRENT_SOURCE_DIR}/e31x_periphs.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_periphs.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_clk_aux.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_clk_mgr.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_dio_control.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_sample_pll.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_reference_pll.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_update_cpld.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_gps_mgr.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_mb_cpld.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_rfdc_regs.py
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${CMAKE_CURRENT_SOURCE_DIR}/x4xx_rfdc_ctrl.py
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${CMAKE_CURRENT_SOURCE_DIR}/sim.py
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)
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list(APPEND USRP_MPM_FILES ${USRP_MPM_PERIPHMGR_FILES})
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set(USRP_MPM_FILES ${USRP_MPM_FILES} PARENT_SCOPE)
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