Sugandha Gupta 67b5827fae ad9361: Add API to set 1R1T/2R2T timing modes ... LVDS interface can support both timing modes 1R1T/2R2T The API sets the required bit in catalina registers.		2018-06-15 16:37:03 -05:00
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experts	uhd: Move internal headers to uhdlib/	2018-03-14 15:17:44 -07:00
rfnoc	Removed unecessary == operation.	2018-04-30 16:09:16 -07:00
usrp	ad9361: Add API to set 1R1T/2R2T timing modes	2018-06-15 16:37:03 -05:00
utils	lib: move atomic.hpp and system_time.hpp to uhdlib	2018-04-06 18:39:11 -07:00