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https://github.com/saymrwulf/uhd.git
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350 lines
12 KiB
C++
350 lines
12 KiB
C++
//
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// Copyright 2010-2011 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include "usrp2_iface.hpp"
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#include "clock_ctrl.hpp"
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#include "usrp2_regs.hpp" //wishbone address constants
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#include <uhd/usrp/dboard_iface.hpp>
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#include <uhd/types/dict.hpp>
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#include <uhd/exception.hpp>
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#include <uhd/utils/algorithm.hpp>
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#include <boost/assign/list_of.hpp>
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#include <boost/asio.hpp> //htonl and ntohl
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#include <boost/math/special_functions/round.hpp>
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#include "ad7922_regs.hpp" //aux adc
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#include "ad5623_regs.hpp" //aux dac
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using namespace uhd;
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using namespace uhd::usrp;
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using namespace boost::assign;
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class usrp2_dboard_iface : public dboard_iface{
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public:
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usrp2_dboard_iface(usrp2_iface::sptr iface, usrp2_clock_ctrl::sptr clock_ctrl);
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~usrp2_dboard_iface(void);
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special_props_t get_special_props(void){
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special_props_t props;
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props.soft_clock_divider = false;
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props.mangle_i2c_addrs = false;
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return props;
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}
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void write_aux_dac(unit_t, aux_dac_t, double);
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double read_aux_adc(unit_t, aux_adc_t);
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void _set_pin_ctrl(unit_t, boost::uint16_t);
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void _set_atr_reg(unit_t, atr_reg_t, boost::uint16_t);
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void _set_gpio_ddr(unit_t, boost::uint16_t);
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void _set_gpio_out(unit_t, boost::uint16_t);
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void set_gpio_debug(unit_t, int);
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boost::uint16_t read_gpio(unit_t);
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void write_i2c(boost::uint8_t, const byte_vector_t &);
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byte_vector_t read_i2c(boost::uint8_t, size_t);
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void set_clock_rate(unit_t, double);
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double get_clock_rate(unit_t);
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std::vector<double> get_clock_rates(unit_t);
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void set_clock_enabled(unit_t, bool);
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double get_codec_rate(unit_t);
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void write_spi(
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unit_t unit,
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const spi_config_t &config,
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boost::uint32_t data,
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size_t num_bits
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);
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boost::uint32_t read_write_spi(
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unit_t unit,
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const spi_config_t &config,
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boost::uint32_t data,
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size_t num_bits
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);
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private:
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usrp2_iface::sptr _iface;
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usrp2_clock_ctrl::sptr _clock_ctrl;
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boost::uint32_t _ddr_shadow;
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boost::uint32_t _gpio_shadow;
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uhd::dict<unit_t, ad5623_regs_t> _dac_regs;
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uhd::dict<unit_t, double> _clock_rates;
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void _write_aux_dac(unit_t);
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};
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/***********************************************************************
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* Make Function
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**********************************************************************/
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dboard_iface::sptr make_usrp2_dboard_iface(
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usrp2_iface::sptr iface,
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usrp2_clock_ctrl::sptr clock_ctrl
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){
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return dboard_iface::sptr(new usrp2_dboard_iface(iface, clock_ctrl));
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}
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/***********************************************************************
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* Structors
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**********************************************************************/
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usrp2_dboard_iface::usrp2_dboard_iface(
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usrp2_iface::sptr iface,
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usrp2_clock_ctrl::sptr clock_ctrl
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){
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_iface = iface;
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_clock_ctrl = clock_ctrl;
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_ddr_shadow = 0;
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_gpio_shadow = 0;
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//reset the aux dacs
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_dac_regs[UNIT_RX] = ad5623_regs_t();
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_dac_regs[UNIT_TX] = ad5623_regs_t();
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BOOST_FOREACH(unit_t unit, _dac_regs.keys()){
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_dac_regs[unit].data = 1;
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_dac_regs[unit].addr = ad5623_regs_t::ADDR_ALL;
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_dac_regs[unit].cmd = ad5623_regs_t::CMD_RESET;
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this->_write_aux_dac(unit);
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}
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//init the clock rate shadows with max rate clock
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this->set_clock_rate(UNIT_RX, sorted(this->get_clock_rates(UNIT_RX)).back());
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this->set_clock_rate(UNIT_TX, sorted(this->get_clock_rates(UNIT_TX)).back());
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}
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usrp2_dboard_iface::~usrp2_dboard_iface(void){
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/* NOP */
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}
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/***********************************************************************
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* Clocks
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**********************************************************************/
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void usrp2_dboard_iface::set_clock_rate(unit_t unit, double rate){
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_clock_rates[unit] = rate; //set to shadow
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switch(unit){
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case UNIT_RX: _clock_ctrl->set_rate_rx_dboard_clock(rate); return;
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case UNIT_TX: _clock_ctrl->set_rate_tx_dboard_clock(rate); return;
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}
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}
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double usrp2_dboard_iface::get_clock_rate(unit_t unit){
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return _clock_rates[unit]; //get from shadow
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}
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std::vector<double> usrp2_dboard_iface::get_clock_rates(unit_t unit){
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switch(unit){
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case UNIT_RX: return _clock_ctrl->get_rates_rx_dboard_clock();
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case UNIT_TX: return _clock_ctrl->get_rates_tx_dboard_clock();
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default: UHD_THROW_INVALID_CODE_PATH();
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}
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}
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void usrp2_dboard_iface::set_clock_enabled(unit_t unit, bool enb){
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switch(unit){
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case UNIT_RX: _clock_ctrl->enable_rx_dboard_clock(enb); return;
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case UNIT_TX: _clock_ctrl->enable_tx_dboard_clock(enb); return;
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}
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}
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double usrp2_dboard_iface::get_codec_rate(unit_t){
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return _clock_ctrl->get_master_clock_rate();
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}
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/***********************************************************************
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* GPIO
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**********************************************************************/
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static const uhd::dict<dboard_iface::unit_t, int> unit_to_shift = map_list_of
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(dboard_iface::UNIT_RX, 0)
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(dboard_iface::UNIT_TX, 16)
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;
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void usrp2_dboard_iface::_set_pin_ctrl(unit_t unit, boost::uint16_t value){
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//calculate the new selection mux setting
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boost::uint32_t new_sels = 0x0;
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for(size_t i = 0; i < 16; i++){
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bool is_bit_set = (value & (0x1 << i)) != 0;
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new_sels |= ((is_bit_set)? U2_FLAG_GPIO_SEL_ATR : U2_FLAG_GPIO_SEL_GPIO) << (i*2);
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}
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//write the selection mux value to register
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switch(unit){
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case UNIT_RX: _iface->poke32(U2_REG_GPIO_RX_SEL, new_sels); return;
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case UNIT_TX: _iface->poke32(U2_REG_GPIO_TX_SEL, new_sels); return;
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}
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}
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void usrp2_dboard_iface::_set_gpio_ddr(unit_t unit, boost::uint16_t value){
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_ddr_shadow = \
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(_ddr_shadow & ~(0xffff << unit_to_shift[unit])) |
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(boost::uint32_t(value) << unit_to_shift[unit]);
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_iface->poke32(U2_REG_GPIO_DDR, _ddr_shadow);
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}
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void usrp2_dboard_iface::_set_gpio_out(unit_t unit, boost::uint16_t value){
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_gpio_shadow = \
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(_gpio_shadow & ~(0xffff << unit_to_shift[unit])) |
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(boost::uint32_t(value) << unit_to_shift[unit]);
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_iface->poke32(U2_REG_GPIO_IO, _gpio_shadow);
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}
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boost::uint16_t usrp2_dboard_iface::read_gpio(unit_t unit){
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return boost::uint16_t(_iface->peek32(U2_REG_GPIO_IO) >> unit_to_shift[unit]);
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}
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void usrp2_dboard_iface::_set_atr_reg(unit_t unit, atr_reg_t atr, boost::uint16_t value){
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//define mapping of unit to atr regs to register address
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static const uhd::dict<
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unit_t, uhd::dict<atr_reg_t, boost::uint32_t>
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> unit_to_atr_to_addr = map_list_of
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(UNIT_RX, map_list_of
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(ATR_REG_IDLE, U2_REG_ATR_IDLE_RXSIDE)
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(ATR_REG_TX_ONLY, U2_REG_ATR_INTX_RXSIDE)
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(ATR_REG_RX_ONLY, U2_REG_ATR_INRX_RXSIDE)
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(ATR_REG_FULL_DUPLEX, U2_REG_ATR_FULL_RXSIDE)
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)
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(UNIT_TX, map_list_of
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(ATR_REG_IDLE, U2_REG_ATR_IDLE_TXSIDE)
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(ATR_REG_TX_ONLY, U2_REG_ATR_INTX_TXSIDE)
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(ATR_REG_RX_ONLY, U2_REG_ATR_INRX_TXSIDE)
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(ATR_REG_FULL_DUPLEX, U2_REG_ATR_FULL_TXSIDE)
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)
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;
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_iface->poke16(unit_to_atr_to_addr[unit][atr], value);
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}
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void usrp2_dboard_iface::set_gpio_debug(unit_t unit, int which){
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this->set_gpio_ddr(unit, 0xffff); //all outputs
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//calculate the new selection mux setting
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boost::uint32_t new_sels = 0x0;
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int sel = (which == 0)?
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U2_FLAG_GPIO_SEL_DEBUG_0:
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U2_FLAG_GPIO_SEL_DEBUG_1;
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for(size_t i = 0; i < 16; i++){
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new_sels |= sel << (i*2);
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}
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//write the selection mux value to register
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switch(unit){
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case UNIT_RX: _iface->poke32(U2_REG_GPIO_RX_SEL, new_sels); return;
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case UNIT_TX: _iface->poke32(U2_REG_GPIO_TX_SEL, new_sels); return;
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}
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}
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/***********************************************************************
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* SPI
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**********************************************************************/
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static const uhd::dict<dboard_iface::unit_t, int> unit_to_spi_dev = map_list_of
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(dboard_iface::UNIT_TX, SPI_SS_TX_DB)
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(dboard_iface::UNIT_RX, SPI_SS_RX_DB)
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;
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void usrp2_dboard_iface::write_spi(
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unit_t unit,
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const spi_config_t &config,
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boost::uint32_t data,
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size_t num_bits
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){
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_iface->write_spi(unit_to_spi_dev[unit], config, data, num_bits);
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}
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boost::uint32_t usrp2_dboard_iface::read_write_spi(
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unit_t unit,
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const spi_config_t &config,
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boost::uint32_t data,
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size_t num_bits
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){
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return _iface->read_spi(unit_to_spi_dev[unit], config, data, num_bits);
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}
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/***********************************************************************
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* I2C
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**********************************************************************/
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void usrp2_dboard_iface::write_i2c(boost::uint8_t addr, const byte_vector_t &bytes){
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return _iface->write_i2c(addr, bytes);
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}
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byte_vector_t usrp2_dboard_iface::read_i2c(boost::uint8_t addr, size_t num_bytes){
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return _iface->read_i2c(addr, num_bytes);
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}
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/***********************************************************************
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* Aux DAX/ADC
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**********************************************************************/
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void usrp2_dboard_iface::_write_aux_dac(unit_t unit){
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static const uhd::dict<unit_t, int> unit_to_spi_dac = map_list_of
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(UNIT_RX, SPI_SS_RX_DAC)
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(UNIT_TX, SPI_SS_TX_DAC)
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;
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_iface->write_spi(
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unit_to_spi_dac[unit], spi_config_t::EDGE_FALL,
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_dac_regs[unit].get_reg(), 24
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);
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}
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void usrp2_dboard_iface::write_aux_dac(unit_t unit, aux_dac_t which, double value){
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_dac_regs[unit].data = boost::math::iround(4095*value/3.3);
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_dac_regs[unit].cmd = ad5623_regs_t::CMD_WR_UP_DAC_CHAN_N;
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typedef uhd::dict<aux_dac_t, ad5623_regs_t::addr_t> aux_dac_to_addr;
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static const uhd::dict<unit_t, aux_dac_to_addr> unit_to_which_to_addr = map_list_of
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(UNIT_RX, map_list_of
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(AUX_DAC_A, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_B, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_C, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_D, ad5623_regs_t::ADDR_DAC_B)
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)
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(UNIT_TX, map_list_of
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(AUX_DAC_A, ad5623_regs_t::ADDR_DAC_A)
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(AUX_DAC_B, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_C, ad5623_regs_t::ADDR_DAC_B)
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(AUX_DAC_D, ad5623_regs_t::ADDR_DAC_A)
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)
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;
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_dac_regs[unit].addr = unit_to_which_to_addr[unit][which];
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this->_write_aux_dac(unit);
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}
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double usrp2_dboard_iface::read_aux_adc(unit_t unit, aux_adc_t which){
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static const uhd::dict<unit_t, int> unit_to_spi_adc = map_list_of
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(UNIT_RX, SPI_SS_RX_ADC)
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(UNIT_TX, SPI_SS_TX_ADC)
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;
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//setup spi config args
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spi_config_t config;
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config.mosi_edge = spi_config_t::EDGE_FALL;
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config.miso_edge = spi_config_t::EDGE_RISE;
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//setup the spi registers
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ad7922_regs_t ad7922_regs;
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switch(which){
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case AUX_ADC_A: ad7922_regs.mod = 0; break;
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case AUX_ADC_B: ad7922_regs.mod = 1; break;
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} ad7922_regs.chn = ad7922_regs.mod; //normal mode: mod == chn
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//write and read spi
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_iface->write_spi(
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unit_to_spi_adc[unit], config,
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ad7922_regs.get_reg(), 16
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);
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ad7922_regs.set_reg(boost::uint16_t(_iface->read_spi(
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unit_to_spi_adc[unit], config,
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ad7922_regs.get_reg(), 16
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)));
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//convert to voltage and return
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return 3.3*ad7922_regs.result/4095;
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}
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