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Martin Braun bf3d9ac2f4 tools: Add tool to analyze settling time of gain of freq changes 
This tool uses the Python API to acquire a snapshot of samples during
a gain or frequency change. It can be used to analyze the settling time
of analog components, as well as the accuracy in time.
It has two combinable ways of analyzing the data: 1) Write it to a file,
or 2) plot the time-domain data.

Example: This would receive several seconds of data from an X3x0 device,
tune to 1 GHz, and then bump the gain by 30 dB after a set amount of
time:

$ rx_settling_time.py -a type=x300 -f 1e9 -g 0 --new-gain 30 --plot
2018-10-11 13:19:22 -07:00
..
debs uhd: Post-release cleanup 2018-07-25 17:42:02 -07:00
dissectors Device3: Change packet-based flow control to byte-based flow control 2018-07-25 15:34:03 -07:00
gr-usrptest tools: Add tool to analyze settling time of gain of freq changes 2018-10-11 13:19:22 -07:00
kitchen_sink utils: add set_thread_name API call, move thread_priority to thread 2017-06-29 13:43:05 -07:00
mega_fft MegaFFT: Fixing copyright, whitespace 2015-08-04 15:21:54 -07:00
nirio_programmer tools: Moved nirio_programmer out of utils 2015-07-21 15:44:05 -07:00
uhd_dump uhd_dump: use LIBS instead of LDFLAGS 2014-09-23 13:08:45 -07:00
uhd_txrx_debug_prints debug_prints_tool: Minor cleanup 2014-11-18 13:04:44 +01:00
README.md tools: Added Balints kitchen sink debug util 2014-10-09 19:56:43 +02:00
usrp_x3xx_fpga_jtag_programmer.sh docs: Changed Xilinx ISE version from 14.4 to 14.7 2014-09-24 18:59:01 -07:00

README.md

USRP™ Tools

This folder contains tools that are useful for working with and/or debugging your USRP™ device. Tools in this directory are not part of UHD. They are either stand-alone programs or software to be used in third-party applications.

For UHD™ software tools, look in uhd/host/utils.

List of Tools

__chdr-dissector/__

This is a packet dissector for Wireshark. It allows you to view the details of a Compressed HeaDeR (CHDR) formatted-packet in Wireshark. The USRP™ B2xx and X3xx use the CHDR format.

__uhd_dump/__

This tool can be used with tcpdump to make sense of packet dumps from your network-connected USRP™ device.

__usrp_x3xx_fpga_jtag_programmer.sh__

This tool is to be used with the USRP™ X300 and X310 devices. It allows you to program the X3x0 FPGA via JTAG. Note that loading the FPGA image via JTAG does not store the FPGA in the on-device flash storage. Thus, as soon as you cycle power, the image will be lost. To permanently burn an FPGA image, please refer to uhd/host/utils/usrp_x3xx_fpga_burner.

This tool requires that Xilinx iMPACT has been installed on your system.

__kitchen_sink__

This is a debugging tool designed to test and stress connections to USRP devices.