mirror of
https://github.com/saymrwulf/uhd.git
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249 lines
8.2 KiB
C++
249 lines
8.2 KiB
C++
//
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// Copyright 2012 Ettus Research LLC
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// Copyright 2018 Ettus Research, a National Instruments Company
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//
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// SPDX-License-Identifier: GPL-3.0-or-later
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//
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#include "usrp2_fifo_ctrl.hpp"
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#include "usrp2_regs.hpp"
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#include <uhd/exception.hpp>
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#include <uhd/transport/vrt_if_packet.hpp>
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#include <uhd/utils/log.hpp>
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#include <uhd/utils/safe_call.hpp>
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#include <boost/asio.hpp> //htonl
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#include <mutex>
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using namespace uhd;
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using namespace uhd::transport;
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static const size_t POKE32_CMD = (1 << 8);
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static const size_t PEEK32_CMD = 0;
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static const double ACK_TIMEOUT = 0.5;
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static const double MASSIVE_TIMEOUT = 10.0; // for when we wait on a timed command
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static const uint32_t MAX_SEQS_OUT = 63;
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#define SPI_DIV SR_SPI_CORE + 0
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#define SPI_CTRL SR_SPI_CORE + 1
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#define SPI_DATA SR_SPI_CORE + 2
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#define SPI_READBACK 0
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// spi clock rate = master_clock/(div+1)/2 (10MHz in this case)
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#define SPI_DIVIDER 4
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class usrp2_fifo_ctrl_impl : public usrp2_fifo_ctrl
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{
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public:
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usrp2_fifo_ctrl_impl(zero_copy_if::sptr xport)
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: _xport(xport), _seq_out(0), _seq_ack(0), _timeout(ACK_TIMEOUT)
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{
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while (_xport->get_recv_buff(0.0)) {
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} // flush
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this->set_time(uhd::time_spec_t(0.0));
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this->set_tick_rate(1.0); // something possible but bogus
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this->init_spi();
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}
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~usrp2_fifo_ctrl_impl(void) override
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{
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_timeout = ACK_TIMEOUT; // reset timeout to something small
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UHD_SAFE_CALL(
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this->peek32(0); // dummy peek with the purpose of ack'ing all packets
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)
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}
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/*******************************************************************
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* Peek and poke 32 bit implementation
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******************************************************************/
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void poke32(const wb_addr_type addr, const uint32_t data) override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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this->send_pkt((addr - SETTING_REGS_BASE) / 4, data, POKE32_CMD);
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this->wait_for_ack(_seq_out - MAX_SEQS_OUT);
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}
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uint32_t peek32(const wb_addr_type addr) override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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this->send_pkt((addr - READBACK_BASE) / 4, 0, PEEK32_CMD);
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return this->wait_for_ack(_seq_out);
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}
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/*******************************************************************
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* Peek and poke 16 bit not implemented
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******************************************************************/
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void poke16(const wb_addr_type, const uint16_t) override
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{
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throw uhd::not_implemented_error("poke16 not implemented in fifo ctrl module");
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}
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uint16_t peek16(const wb_addr_type) override
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{
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throw uhd::not_implemented_error("peek16 not implemented in fifo ctrl module");
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}
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/*******************************************************************
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* FIFO controlled SPI implementation
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******************************************************************/
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void init_spi(void)
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{
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std::lock_guard<std::mutex> lock(_mutex);
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this->send_pkt(SPI_DIV, SPI_DIVIDER, POKE32_CMD);
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this->wait_for_ack(_seq_out - MAX_SEQS_OUT);
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_ctrl_word_cache = 0; // force update first time around
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}
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uint32_t transact_spi(int which_slave,
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const spi_config_t& config,
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uint32_t data,
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size_t num_bits,
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bool readback) override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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// load control word
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uint32_t ctrl_word = 0;
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ctrl_word |= ((which_slave & 0xffffff) << 0);
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ctrl_word |= ((num_bits & 0x3ff) << 24);
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if (config.mosi_edge == spi_config_t::EDGE_FALL)
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ctrl_word |= (1 << 31);
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if (config.miso_edge == spi_config_t::EDGE_RISE)
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ctrl_word |= (1 << 30);
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// load data word (must be in upper bits)
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const uint32_t data_out = data << (32 - num_bits);
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// conditionally send control word
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if (_ctrl_word_cache != ctrl_word) {
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this->send_pkt(SPI_CTRL, ctrl_word, POKE32_CMD);
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this->wait_for_ack(_seq_out - MAX_SEQS_OUT);
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_ctrl_word_cache = ctrl_word;
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}
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// send data word
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this->send_pkt(SPI_DATA, data_out, POKE32_CMD);
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this->wait_for_ack(_seq_out - MAX_SEQS_OUT);
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// conditional readback
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if (readback) {
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this->send_pkt(SPI_READBACK, 0, PEEK32_CMD);
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return this->wait_for_ack(_seq_out);
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}
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return 0;
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}
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/*******************************************************************
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* Update methods for time
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******************************************************************/
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void set_time(const uhd::time_spec_t& time) override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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_time = time;
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_use_time = _time != uhd::time_spec_t(0.0);
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if (_use_time)
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_timeout = MASSIVE_TIMEOUT; // permanently sets larger timeout
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}
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uhd::time_spec_t get_time() override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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return _time;
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}
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void set_tick_rate(const double rate) override
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{
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std::lock_guard<std::mutex> lock(_mutex);
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_tick_rate = rate;
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}
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private:
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/*******************************************************************
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* Primary control and interaction private methods
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******************************************************************/
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UHD_INLINE void send_pkt(wb_addr_type addr, uint32_t data, int cmd)
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{
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managed_send_buffer::sptr buff = _xport->get_send_buff(0.0);
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if (not buff) {
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throw uhd::runtime_error("fifo ctrl timed out getting a send buffer");
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}
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uint32_t* trans = buff->cast<uint32_t*>();
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trans[0] = htonl(++_seq_out);
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uint32_t* pkt = trans + 1;
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// load packet info
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vrt::if_packet_info_t packet_info;
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packet_info.packet_type = vrt::if_packet_info_t::PACKET_TYPE_CONTEXT;
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packet_info.num_payload_words32 = 2;
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packet_info.num_payload_bytes =
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packet_info.num_payload_words32 * sizeof(uint32_t);
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packet_info.packet_count = _seq_out;
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packet_info.tsf = _time.to_ticks(_tick_rate);
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packet_info.sob = false;
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packet_info.eob = false;
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packet_info.has_sid = false;
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packet_info.has_cid = false;
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packet_info.has_tsi = false;
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packet_info.has_tsf = _use_time;
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packet_info.has_tlr = false;
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// load header
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vrt::if_hdr_pack_be(pkt, packet_info);
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// load payload
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const uint32_t ctrl_word = (addr & 0xff) | cmd | (_seq_out << 16);
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pkt[packet_info.num_header_words32 + 0] = htonl(ctrl_word);
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pkt[packet_info.num_header_words32 + 1] = htonl(data);
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// send the buffer over the interface
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buff->commit(sizeof(uint32_t) * (packet_info.num_packet_words32 + 1));
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}
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UHD_INLINE bool wraparound_lt16(const int16_t i0, const int16_t i1)
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{
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if (((i0 ^ i1) & 0x8000) == 0) // same sign bits
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return uint16_t(i0) < uint16_t(i1);
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return int16_t(i1 - i0) > 0;
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}
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UHD_INLINE uint32_t wait_for_ack(const uint16_t seq_to_ack)
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{
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while (wraparound_lt16(_seq_ack, seq_to_ack)) {
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managed_recv_buffer::sptr buff = _xport->get_recv_buff(_timeout);
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if (not buff) {
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throw uhd::runtime_error("fifo ctrl timed out looking for acks");
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}
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const uint32_t* pkt = buff->cast<const uint32_t*>();
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vrt::if_packet_info_t packet_info;
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packet_info.num_packet_words32 = buff->size() / sizeof(uint32_t);
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vrt::if_hdr_unpack_be(pkt, packet_info);
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_seq_ack = ntohl(pkt[packet_info.num_header_words32 + 0]) >> 16;
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if (_seq_ack == seq_to_ack) {
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return ntohl(pkt[packet_info.num_header_words32 + 1]);
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}
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}
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return 0;
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}
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zero_copy_if::sptr _xport;
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std::mutex _mutex;
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uint16_t _seq_out;
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uint16_t _seq_ack;
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uhd::time_spec_t _time;
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bool _use_time;
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double _tick_rate;
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double _timeout;
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uint32_t _ctrl_word_cache;
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};
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usrp2_fifo_ctrl::sptr usrp2_fifo_ctrl::make(zero_copy_if::sptr xport)
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{
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return sptr(new usrp2_fifo_ctrl_impl(xport));
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}
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