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876d4150aa
Note: template_lvbitx.{cpp,hpp} need to be excluded from the list of
files that clang-format gets applied against.
102 lines
2.7 KiB
C++
102 lines
2.7 KiB
C++
//
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// Copyright 2010-2012,2014 Ettus Research LLC
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// Copyright 2018 Ettus Research, a National Instruments Company
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//
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// SPDX-License-Identifier: GPL-3.0-or-later
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//
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#ifndef INCLUDED_CLOCK_CTRL_HPP
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#define INCLUDED_CLOCK_CTRL_HPP
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#include "usrp2_iface.hpp"
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#include <uhd/utils/noncopyable.hpp>
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#include <memory>
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#include <vector>
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class usrp2_clock_ctrl : uhd::noncopyable
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{
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public:
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typedef std::shared_ptr<usrp2_clock_ctrl> sptr;
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virtual ~usrp2_clock_ctrl(void) = 0;
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/*!
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* Make a clock config for the ad9510 ic.
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* \param iface a pointer to the usrp2 interface object
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* \param spiface the interface to spi
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* \return a new clock control object
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*/
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static sptr make(usrp2_iface::sptr iface, uhd::spi_iface::sptr spiface);
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/*!
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* Get the master clock frequency for the fpga.
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* \return the clock frequency in Hz
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*/
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virtual double get_master_clock_rate(void) = 0;
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/*!
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* Enable/disable the rx dboard clock.
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* \param enb true to enable
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*/
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virtual void enable_rx_dboard_clock(bool enb) = 0;
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/*!
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* Set the clock rate on the rx dboard clock.
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* \param rate the new clock rate
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* \throw exception when rate invalid
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*/
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virtual void set_rate_rx_dboard_clock(double rate) = 0;
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/*!
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* Get a list of possible rx dboard clock rates.
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* \return a list of clock rates in Hz
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*/
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virtual std::vector<double> get_rates_rx_dboard_clock(void) = 0;
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/*!
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* Enable/disable the tx dboard clock.
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* \param enb true to enable
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*/
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virtual void enable_tx_dboard_clock(bool enb) = 0;
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/*!
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* Set the clock rate on the tx dboard clock.
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* \param rate the new clock rate
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* \throw exception when rate invalid
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*/
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virtual void set_rate_tx_dboard_clock(double rate) = 0;
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/*!
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* Get a list of possible tx dboard clock rates.
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* \return a list of clock rates in Hz
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*/
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virtual std::vector<double> get_rates_tx_dboard_clock(void) = 0;
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/*!
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* Enable/disable external reference.
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* \param enb true to enable
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*/
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virtual void enable_external_ref(bool enb) = 0;
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/*!
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* Enable/disable test clock output.
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* \param enb true to enable
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*/
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virtual void enable_test_clock(bool enb) = 0;
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/*!
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* Enable/disable the ref clock output over the serdes cable.
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* \param enb true to enable
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*/
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virtual void enable_mimo_clock_out(bool enb) = 0;
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/*!
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* Set the output delay of the mimo clock
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* Used to synchronise daisy-chained USRPs over the MIMO cable
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* Can also be used to adjust delay for uneven reference cable lengths
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* \param delay the clock delay in seconds
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*/
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virtual void set_mimo_clock_delay(double delay) = 0;
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};
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#endif /* INCLUDED_CLOCK_CTRL_HPP */
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