All MPM devices use identical implementations of the transport API.
Minor differences between the actual lines of code in the various
transport adapters are due to minor optimizations, such as hard-coding
'udp' as the only valid transport type for the N3xx series.
This change moves the implementation of the transport API calls
(get_chdr_link_options() and get_chdr_link_types()) into
PeriphManagerBase. The class attributes _xport_adapter_mgrs is also
declared in that class, but defining them is left up to the individual
device implementations.
get_sync_sources() was not implemented for E31x and E320. Because UHD
assumes this exists, calling this would cause an error like this:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=e3xx")
>>> U.get_sync_sources(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_sync_sources(0)
RuntimeError: rpc::timeout: Timeout of 2000ms while calling RPC function
'get_sync_sources'
Currently, the default clock/time source is whatever the user configured
in the last session.
This fixes the scenario were you have any MPM device and do this:
$ benchmark_rate --args $args,clock_source=external
But whoops! You forgot to attach an external 10 MHz. PLL lock fails,
nothing works. No worries, you run it again:
$ benchmark_rate --args $args
With the previous behaviour, this would retain the setting to
'external', because there's nothing to overwrite it. You would need to
append `clock_source=internal` to get a working device again. Calling
multi_usrp::set_clock_source("internal"), or a similar API call, might
not be sufficient because the PLL lock failure might crash the program
before updating the clock source is possible.
The problem with this is twofold:
- All non-MPM devices behave differently, i.e., they have a fixed
default ('internal') which is always applied if no other option is
given. This is an internal inconsistency.
- Some applications (like gr-uhd's GRC bindings) simply don't set
a clock/time source when selecting a "default", or they try and update
the clock/time source using the API calls.
Therefore, we align the behaviour of MPM devices with the other devices,
and fall back to an internal source if nothing else is provided.
The E31x and E320 devices have one virtual daughterboard, and it is
always present. This is different from N3xx, which is where the MPM code
for these devices is based upon.
During the E3xx initialization, we make sure that our single
"daughterboard" exists and is responsive. That means we can remove some
code that tests for the availability and number of daughterboards, which
we need on N3xx (which works with zero, one, or two daughterboards).
This also allows us some minor deduplication of code.
Handling of EEPROM read was cleanup in PeriphManagerBase such that EEPROM
reading for mother and daugther board have similar names and signatures.
Base class supports symbol names for the nvmem files which make it easy
to find them by name such as db0_eeprom instead of addresses like
ff020000.i2c:cros-ec@3c:db0-i2c-tunnel.
Base class furthermore reads out all available auxiliary board EEPROM
files and stores them in a dictionary member.
The _get_dboard_eeprom_info implementations are the same with the
exception of how the dboard eeprom is actually read. Break that out into
a _read_dboard_eeprom method to reduce code duplication.
The base class now defines a lambda expression for the eeprom reader
which can be changed in subclasses.
Co-authored-by: Lars Amsel <lars.amsel@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
This class is a remnant of UHD 3, and is no longer used anywhere. SID is
no longer used at all in UHD, in fact, which means the class did not
represent a valid data structure.
- ref_locked failure would throw a warning, even though this can happen
in normal operations, and the return value of the get_ref_locked()
function is all the info needed
- get_fpga_type() doesn't need to be called from e31x_periphs, because
it is not read from the motherboard registers (is read from the
EEPROM)
The clock source on E310 is always internal. This patch removes the
variables regarding the clock source (since they are superfluous). This
fixes a bug where self._clock_source on the e31x class would never get
initialized.
- Remove superfluous INFO logging
- Improve formatting in many places
- Improve Pylint score in various places
- Add tear_down to DB object
- Simplify custom EEPROM code for E310
- Fix time source selection code
- Remove references to GPS_CTRL and GPS_STATUS (are E320 only)
- Move clock source control out of MboardRegs object
Many small cleanups:
- Fix copyright headers
- Fix superfluous imports
- Pull some constants out of classes where appropriate
- Fix formatting
- Improve/fix some docstrings
- Disable specific Pylint warnings where appropriate
- Global catches use BaseException instead of Exception
- Don't use len() for empty checks
- Make sure to declare all self attributes in __init__ (note: this is
particularly of interest for E310, becuase its regular init happens
outside of __init__)
- Compacted some E310 code that had multi-DB checks
This assumes an existence of mboard_regs_control in PeriphManagerBase
and implements most TK controls there. All the *_periphs.py files can
now use a common class for registers, including the TK access, but also
git hash, build date, and device ID access.
This also fixes two issues:
- set_timekeeper_time() and set_tick_period() had a bug that would
incorrectly calculate the upper 32 bits of their respective registers.
- N3xx had a bug that would swap around set time now and next PPS. This
got auto-fixed because the common code never had this bug.
- Turns the E310 into an MPM device (like N3xx, E320)
- Factor out common code between E320 and E310, maximize sharing between
the two devices
- Remove all pre-MPM E310 code that is no longer needed
- Modify MPM to remove all existing overlays before applying new ones
(this is necessary to enable idle image mode for E310)
Co-authored-by: Virendra Kakade <virendra.kakade@ni.com>
Signed-off-by: Virendra Kakade <virendra.kakade@ni.com>
