For the sake of completeness, the bitfields and register offsets defined
for interacting with the MB CPLD are matched with the HDL definitions,
even for registers that aren't being used by MPM at this moment.
This adds a new class, X4xxDbMixin, which can be used for daughterboards
that are installed into an X4xx motherboard. It collects all the common
tasks between such daughterboards.
The mixin is also mixed into the ZBX daughterboard class. The other
dboards (IF test CCA, Debug DB) are not modified.
This API call does nothing useful, is never called, and references
non-existant attributes of the x4xx class (qspi_cs, qspi_nodes). Most
likely this was used during early revisions of X410 development and
controlled hardware that no longer exists.
Method to get the lock status of the GPS sensor should be
get_gps_lock_sensor
instead of
get_gps_locked_sensor
Changing this conforms the x4xx with other USRPs and also
makes the call in get_gps_sensor_status executable at all.
We currently do not set the calibration mode during ADC self
calbration. The default mode is selected in Vivado configuration.
Nevertheless we have seen issues where not setting the mode
lead to poor results in ADC self calibration.
This commit enable the RPC to call the set_calibration_mode
which was already implemented in our RFDC lib.
Currently the E320's integrated GPSDO can be disabled using the
"enable_gps" argment at MPM initialization time (e.g. when the radio
powers on and launches the MPM daemon). However, there is no way for
a UHD application to disable the GPSDO at connection time.
This patch allows the existing "enable_gps" arg to be accepted when
initiating an MPM session from UHD, such that an application can pass
the arg "enable_gps=0" at connection time to disable the GPSDO. The
default power state of the GPSDO is restored when the session ends.
Edit: On top of the original commit by draeman-synoptic, the MPM minor
compat number was also increased to denote new non-breaking feature
support.
Co-authored-by: mattprost <matt.prost@ni.com>
Signed-off-by: mattprost <matt.prost@ni.com>
This prevents any concurrency issues that might arise from killing and
spawning a new timer in the rpc server.
Signed-off-by: mattprost <matt.prost@ni.com>
This removes the race condition that can occur by reading the value of
the rpc server's shared state claim token value without a lock. After
the lock is released, it is possible that another process could preempt
and modify the value with a different claim operation. Also, added
timeouts to acquire the shared state lock for claim, reclaim, and
unclaim operations.
Signed-off-by: mattprost <matt.prost@ni.com>
The rpc_server_process was spawning with its parameters reversed. The
calling function also had its parameters reversed, so this is
functionally the same. This change makes sure that the parameters are
aligned with the arguments throughout the callstack.
Signed-off-by: mattprost <matt.prost@ni.com>
Each MAC address should be only assigned to one link at a time.
If the motherboard EEPROM is messed up, it might happen that
there are more links connected to a single MAC.
So in that case a
[link_index] = ip2.link_lookup(address=mac_addr)
results in a ValueError (too many values to unpack) which gives
no clue on what actually went wrong. Instead we check the len
of he link_lookup result and give a more meaningful error message.
This reverts the Raw UDP host changes which is breaking
multiple interface streaming.
Commits addb81aa5d2d6adcd3a0c7a8d59fcd96af0c1ec4^..b1ca51f97aaa2226ed6ef339fb26fbea54ab7593
are reverted.
Reverts:
doc: Update manual on streaming
examples: Add remote RX streaming example
rfnoc: Enable remote UDP streaming
mpm: e320: Enable raw UDP streaming
mpm: n3xx: Enable raw UDP streaming
mpm: x4xx: Enable transport manager adapter
mpm: Enable opt-in transport adapter control
rfnoc: Transition stream managers and mgmt_portal to topo_graph_t
rfnoc: Add topology graph object
uhd/mpm: Add API to set remote routes
mpm: xports: Add XportAdapterMgr class
- Checks FPGA compat number is 6.1
- If so, it enables the transport adapter manager
- Note that E320 may still have raw UDP streaming feature disabled. In
that case, it simply doesn't report that capability.
- Checks if the compat number is at least 8.1
- If so, enables the transport adapter managers
- Note N3xx FPGA may still not have raw UDP streaming enabled, in which
case that capability is simply not reported.
N3xx and E320 (although potentially other USRPs too) don't always enable
the raw UDP streaming capabilities. This change updates the transport
adapter control to not provide access to any registers or features that
are unavailable to the transport adapter. This way, the FPGA bitfile can
be kept minimal (by not providing raw UDP streaming capabilities) and
software can determine those capabilities easily.
This is an addition to both PeriphManagerBase (MPM) and mb_iface (UHD).
Main changes:
- Addition of mb_iface::add_remote_chdr_route() and
mb_iface::get_chdr_xport_adapters()
- In X3x0, these APIs are stubbed out.
- In mpmd, these APIs are implemented and call the new MPM APIs (see
below)
- Addition of PeriphManagerBase.add_remote_chdr_route() and
PeriphManagerBase.get_chdr_xport_adapters()
- The PeriphManagerBase implements these APIs fully when the
'remote_udp_streaming' FPGA feature is detected.
- The MPM compat number is bumped to 4.3. UHD will continue to work with
lower compat numbers. It will query the compat number and act
accordingly.
This adds several features to the SystemVerilog Eth/IPv4/UDP transport
adaptor including:
- Compat register
- NODE_INST register
- Capabilities register
- KV map access for custom routing on RX data paths
- CHDR header removal for raw payloads to be sent over UDP
Also adds xport_adapter_ctrl.py, which allows controlling the new
registers.
Co-authored-by: Martin Braun <martin.braun@ettus.com>
The original commit did not add the compat_num.py file to the
CMakeLists.txt file. This would only be a problem when re-running
CMake with a different branch.
All MPM devices use identical implementations of the transport API.
Minor differences between the actual lines of code in the various
transport adapters are due to minor optimizations, such as hard-coding
'udp' as the only valid transport type for the N3xx series.
This change moves the implementation of the transport API calls
(get_chdr_link_options() and get_chdr_link_types()) into
PeriphManagerBase. The class attributes _xport_adapter_mgrs is also
declared in that class, but defining them is left up to the individual
device implementations.
This is a set of strings, each of which describe features the FPGA has.
The purpose of this is to provide a standard location to store knowledge
about available features. Typically, the code will read the compat
numbers to see if a feature is available, and then store a corresponding
string in this set.
XportMgrUDP.get_chdr_link_options() now also returns the interface name
(e.g., sfp0) in its return values, which is very useful for identifying
a transport in a different context (e.g., when only the node_inst value
of a transport is known).
This is a class that allows handling compat numbers as a type:
>>> cn = CompatNumber(4, 3)
>>> print(cn.major)
4
>>> cn < CompatNumber(4, 5)
True
>>> cn == CompatNumber(4.3)
True
This code was copy/pasta'd from N3x0. In theory, X410 can have more
options regarding streaming than UDP, although for now, this function
returns the exact same as before, it's just no longer hard coded.
This commit reverts the changes made in commit 81a9cc1f8 to reduce the
time for the LMK PLL to report lock status. The decision to revert the
change comes after an investigation found that reducing the overall time
to detect lock correlates with an increase in an error reported by the
TDC ('[ERROR] TDC measurements show a wide range of values! Check your
clock rates for incompatibilities. ... Uncaught exception in method
set_clock_source: TDC measurement out of expected range!'). Despite the
LMK PLL reporting lock status, our investigation revealed that it takes
additional time for the PLL to align the daughterboards' clocks closely
enough to pass the TDC measurement's range limit (i.e., no samples
exceeding the measurement mean +/- 500 ps). Reverting the change
increases the amount of time between achieving lock status and taking
the TDC measurements, thus greatly reducing the likelihood of the
reported error.
In commit bc8713e7af the SPI functionality was made available
conditionally depending on the FPGA version number. For this,
all SPI entries were removed from the X4XX_GPIO_SRC_RADIO variable
and put into an own variable. But therefore SPI was not available
anymore as valid source for GPIO. This change reintroduces SPI and
thus enables the SPI functionality again.
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Add the Filter API to n3xx specifically for the AD937x device. The TX
filter is limited to 32 taps, and the RX filter is limited to 48 taps.
This feature requires MPM version 4.2 or later on the device.
Co-authored-by: bpadalino <bpadalino@gmail.com>
Signed-off-by: mattprost <matt.prost@ni.com>
Allow users to control the Mykonos frontend bandwidth settings for
Rx and Tx. Note that this operation requires the daughterboard to
re-initialize, so it may take some time. Values for frontend filter
settings were derived using ADI's AD9371 Filter Wizard.
This feature requires MPM version 4.1 or later on the device.
Co-authored-by: bpadalino <bpadalino@gmail.com>
Signed-off-by: mattprost <matt.prost@ni.com>
Add support for reading the number of supported SPI slaves from
the device. This has become necessary because we may have bitfiles
with different capabilities and we want to report this back correctly.
In f73e327, we modified PeriphManagerBase to explicitly list all
required methods as per the MPM/UHD API. This had an unintended side
effect: Because the clocking methods on x4xx are imported from
X4xxClockMgr, and not defined on x4xx itself, the method used to import
methods from X4xxClockMgr onto x4xx would refuse to re-define API calls
such as set_clock_source(), get_clock_source(), and so on.
The solution is to allow _add_public_methods() to overwrite existing
methods, which means we can overwrite abstract methods from
PeriphManagerBase in this fashion.
Without this patch, UHD sessions could fail in the following manner:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=x4xx")
>>> U.get_clock_source(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_clock_source(0)
RuntimeError: RuntimeError: Error during RPC call to `get_clock_source'.
Error message: get_clock_source() not available on this device!
get_sync_sources() was not implemented for E31x and E320. Because UHD
assumes this exists, calling this would cause an error like this:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=e3xx")
>>> U.get_sync_sources(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_sync_sources(0)
RuntimeError: rpc::timeout: Timeout of 2000ms while calling RPC function
'get_sync_sources'
All PeriphManagerBase childs need to implement
- get_{clock,time,sync}_source()
- get_{clock,time,sync}_sources()
- set_{clock,time,sync}_source()
So we populate PeriphManagerBase with defaults for all of those.
Currently, the default clock/time source is whatever the user configured
in the last session.
This fixes the scenario were you have any MPM device and do this:
$ benchmark_rate --args $args,clock_source=external
But whoops! You forgot to attach an external 10 MHz. PLL lock fails,
nothing works. No worries, you run it again:
$ benchmark_rate --args $args
With the previous behaviour, this would retain the setting to
'external', because there's nothing to overwrite it. You would need to
append `clock_source=internal` to get a working device again. Calling
multi_usrp::set_clock_source("internal"), or a similar API call, might
not be sufficient because the PLL lock failure might crash the program
before updating the clock source is possible.
The problem with this is twofold:
- All non-MPM devices behave differently, i.e., they have a fixed
default ('internal') which is always applied if no other option is
given. This is an internal inconsistency.
- Some applications (like gr-uhd's GRC bindings) simply don't set
a clock/time source when selecting a "default", or they try and update
the clock/time source using the API calls.
Therefore, we align the behaviour of MPM devices with the other devices,
and fall back to an internal source if nothing else is provided.
The E31x and E320 devices have one virtual daughterboard, and it is
always present. This is different from N3xx, which is where the MPM code
for these devices is based upon.
During the E3xx initialization, we make sure that our single
"daughterboard" exists and is responsive. That means we can remove some
code that tests for the availability and number of daughterboards, which
we need on N3xx (which works with zero, one, or two daughterboards).
This also allows us some minor deduplication of code.
