Implement workaround to commit 3cb868e and do not report error
on missing *-version-info-dtsi files. These include files are listed
in the bsp (board support package) for X4xx devices, but are dynamically
generated at build time (in the dts source folder).
- The main installation path is now always an include path and can be
used as such (e.g., /usr/share/uhd/rfnoc)
- fpga_includes and dts_includes have been streamlined. They now work
identically on all blocks/modules/_device_, and can use resolve() the
same way as other arguments do.
- Error messages for missing include files are improved.
With ruamel.yaml versions >= 0.18, the current image builder doesn't
work, because it uses a deprecated call.
This call was part of a wrapper that fixes Python 3.5-compatibility.
Since our minimum version of Python is now 3.6, we don't need this
anyway so we just can just replace the deprecated usage with
ruamel.yaml's round-trip loader.
The image builder will currently emit a warning if a NoC-block has
unconnected ports. This requires specifying `-W` to continue building,
which is the intended behaviour.
However, there are cases where there are legitimate reasons to not
connect a block, e.g., in the X310, where the radio block has 2x2 ports,
but we only connect 2 RX ports, and 1 TX port.
This adds a way to declare a "null" connection, which makes it explicit
in the image core YAML that a connection was deliberately omitted. Such
connections are created by connecting to a port called "_none_", e.g.:
```
connections:
- { srcblk: _device_, srcport: _none_, dstblk: radio0, dstport: in_1 }
```
The block name is irrelevant, but the schema requires providing a block
name.
This commit also amends the x3xx_radio_base.yml to avoid warnings when
building X3x0 bitfiles.
- If there are any warnings during the image core parsing, the build is
now skipped unless --no-warnings (-W) is also given.
- Exceptions in the ImageBuilderConfig are now caught in
rfnoc_image_builder and an error message is logged, instead of
printing the Python exception backtrace.
When -S is provided without -K (--secure-core without --secure-key), the
build fails without comment. This provides a default value for -K based
on the default Vivado key.
When an image core file has a missing, required IO port connection, the
tool will now suggest which ports may be sensible options for
connecting.
When there is a single available option, it will even suggest which line
to add to the image core YAML to fix.
- Blocks, modules, and transport adapter YAMLs may include a `checks`
section and define validation checks there
- IO ports can declare if they require a connection or not
- Unconnected NoC-Block data ports trigger a warning now
- All RFNoC capable targets now require rfnoc_image_builder to be built
- `make help` is updated for all targets to provide more useful and
up-to-date information
- The FPGA manual is also updated
- All checked-in build artifacts are now removed from git
- axi_ram_fifo.yml is updated to provide include path information
(required for building N3xx BIST images, which use this)
Most important effect of this change: rfnoc_image_builder is now
required to build bitfiles, 'make' alone won't suffice any longer!
This is a huge changeset to the image builder that combines multiple new
features:
- There no longer is a separate edge file for the static router. The
static routes are generated as a Verilog parameter directly into the
rfnoc_core_kernel (which is also modified).
- image_builder.py is split up into several smaller files. Code is moved
into yaml_utils.py, and the new files grc.py, builder_config.py
- Generic module support is added. Aside from noc blocks and stream
endpoints, we can now instantiate arbitrary modules (they also require
a YAML description file).
- To enable such modules, resets are now also tracked the same way that
clock domains are.
- The ImageBuilderConfig config object now more closes matches the
original YAML file. The attributes 'clk_domain_con' and 'block_con' are
removed. Instead, the attributes 'connections' and 'clk_domains' are
sanitized and amended with extra annotations. The templates are
updated to reflect this change.
- IO ports can now carry parameters, e.g., to have variable wire widths
based on the configuration.
- Many Pylint warnings were resolved.
- Add inheritance support for image core YAML files.
This allows image core files to (recursively) inherit from other image
core files. To do so, simply put an 'inherit' entry at the top of the
file:
```yaml
inherit: 'x410_radio_base.yml'
```
- The inheritance feature is used as part of the image core files.
- Image core and DTS files are now generated as a build artefact into
the build directory. This requires the usage of rfnoc_image_builder to
build images. As a consequence, it is no longer required to check in
image core Verilog files.
- As another consequence, rfnoc_image_builder is required to build
bitfiles!
- Image flavours are no longer defined through Makefiles, but purely
from the image core YAML files.
- Remove all image core YAML files that do not generate a shipping
image. Because of the inheritance feature and the requirement to use
the image builder, it is trivial to add new YAML files.
- Add support for transport adapters through the YAML files. Before,
transport adapters were inferred from the make target (e.g.,
X410_X4_200 would have four 10GbE links based on the 'X4' substring).
Now, transport adapters are defined via the image core YAML.
- This feature is currently only used (or can be used) by the X4xx
series. Older devices may or may not be ported to allow custom
transport adapters in the future.
- Add parameters to the BSP YAMLs and the devices itself. This allows
setting global parameters in the image core files. For example, the
X4x0 devices use this to decide if they instantiate DRAM channels.
- DTS includes and constraint files can now be requested by
blocks/transport adapter through their YAML files. They do no longer
need to be listed in the Makefile.
- Support for secure image cores. These are image cores that allow
incorporating RFNoC blocks that require license keys and thus can't
live in an open-source environment. This solution adds the option for
secure image cores without touching the open source feature set.
- Add --reuse option to allow manual editing of generated artefacts
- Allow IO signatures from any module: until now IO signatures had to be
defined in a single file (io_signatures). This file will persist. In
addition each module can add its own IO signature as with the same
format the core IO signatures placed under the top level key
`io_signatures`. IO signatures are still maintained in a global
dictionary. The consequence is that they can be shared among
independent modules as well as they have to have a globally unique
name. The image builder will warn about detected name clashes for the
signatures.
- As a consequence, some less commonly used IO signatures were moved to
their corresponding module YAML files.
Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Lars Amsel <lars.amsel@ni.com>
There is no reason why an RFNoC block couldn't only have control traffic
(e.g., and embedded processor), or only have inputs/outputs (i.e.,
a true sink/source block). The tooling wasn't expecting that, and
had hard-coded the assumption that every block has at least one input
AND at least one output.
This simply removes the restriction from the image builder and updates
the image core template.
This modifies repeat_fpga_build.py such that it can take a YAML file as
input, not just a make target. It will then use the image builder to
prepare the build and generate a valid make command, which in turn is
used to build FPGA images repeatedly.
This options allows to install Python utils, including a subset of the
Python API 'uhd' module, without having to compile UHD. The main reason
to do this is to allow installing the RFNoC image builder without the
rest of UHD. To achieve this, run cmake as such:
cmake /path/to/uhd -DENABLE_LIBUHD=OFF -DENABLE_PYMOD_UTILS=ON
You might also want to disable building the manual in this case.
The refactoring required to enable this also fixes an issues when
installing UHD from source into a venv. This updates the CMake to use
pip3 to install the module, fixing some warnings and install issues.
- Use find_package(pybind11) to find a system-wide Pybind11. This will
take preference over the vendored version of Pybind11, unless
requested otherwise.
- Fix a typo.
- Image core files can now provide timebase_clock and ctrl_clock fields
to blocks, which will populate the backend interface accordingly.
- Clocks ports now have a direction associated (in, out).
When calling tx_waveforms.py with the --dram option, it will internally
use DramTransmitter and first upload the signal before transmitting it
from DRAM.
This fixes an issue where on Ubuntu 22.04 (with Python 3.10), the
installation of the Python module would go to $PREFIX/local/lib even if
the rest goes to $PREFIX/lib. We achieve this by avoiding a) using
sysconfig.get_path() to get *both* the prefix and the library path, and
then also avoiding the `posix_local` install scheme.
Note: This same logic fails to work for MPM, so we don't touch that, but
simply force MPM to use the same path as UHD has. This means MPM is
unaffected when built by itself, but follows the UHD path when built as
part of UHD.
Hat-tip to Johannes Demel for pointing out this solution path.
This adds support for different CHDR widths in the RFNoC image builder
and allows you to specify which crossbar paths to enable in the CHDR
crossbar.
In the HDL, a different CHDR width can be specified for each transport
adapter using Verilog parameters. In the RFNoC image YAML, the width of
each stream endpoint can be specified using the chdr_width parameter,
and the width for all blocks can be specified using the
block_chdr_width parameter.
With this change, the existing top-level "chdr_width" setting is now
effectively the default when not otherwise specified.
The crossbar_routes parameter can be provided using an NxN array where
N is the number of transport adapters + stream endpoints for the image
being built. For example, on X310 the following could be used:
crossbar_routes:
# eth0 pcie ep1 ep3 ep5
# eth1 ep0 ep2 ep4
- [ 1, 0, 0, 1, 1, 1, 1, 1, 1 ] # eth0 (10/1 GbE/Aurora)
- [ 0, 1, 0, 1, 1, 1, 1, 1, 1 ] # eth1 (10 GbE/Aurora)
- [ 0, 0, 1, 1, 1, 1, 1, 1, 1 ] # pcie
- [ 1, 1, 1, 0, 0, 0, 0, 1, 1 ] # ep0 (radio0.0)
- [ 1, 1, 1, 0, 0, 0, 0, 1, 1 ] # ep1 (radio0.1)
- [ 1, 1, 1, 0, 0, 0, 0, 1, 1 ] # ep2 (radio1.0)
- [ 1, 1, 1, 0, 0, 0, 0, 1, 1 ] # ep3 (radio1.1)
- [ 1, 1, 1, 1, 1, 1, 1, 0, 0 ] # ep4 (replay0.0)
- [ 1, 1, 1, 1, 1, 1, 1, 0, 0 ] # ep5 (replay0.1)
This would disable loopback paths between transport adapters, between
radio ports, and between replay ports.
Note that these features should be used with care. Removing some
crossbar routes may prevent the USRP from functioning correctly.
Specifying improper CHDR widths may lead to streaming issues.
This adds options to rfnoc_image_builder to make optional the fields of
the header in the generated RFNoC image core files. This includes the
copyright, license, date/time of generation, and source hash.
This commit adds support for the UHD power calibration API on the E3xx
family of radios. It also updates the documentation to reflect this
support, and it adds support to the uhd_power_cal.py utility by adding a
"calibrator" subclass for E3xx radios.
This adds two functions from C++ land into Python:
- uhd.types.separate_device_addr()
- uhd.types.combine_device_addrs()
Signed-off-by: Martin Braun <martin.braun@ettus.com>
The original commit did not add the compat_num.py file to the
CMakeLists.txt file. This would only be a problem when re-running
CMake with a different branch.
This allows a UHD build to link to python modules installed in a virtual
environment such a venv or pyenv.
Signed-off-by: mattprost <matt.prost@ni.com>
