This adds several features to the SystemVerilog Eth/IPv4/UDP transport
adaptor including:
- Compat register
- NODE_INST register
- Capabilities register
- KV map access for custom routing on RX data paths
- CHDR header removal for raw payloads to be sent over UDP
Also adds xport_adapter_ctrl.py, which allows controlling the new
registers.
Co-authored-by: Martin Braun <martin.braun@ettus.com>
The original commit did not add the compat_num.py file to the
CMakeLists.txt file. This would only be a problem when re-running
CMake with a different branch.
All MPM devices use identical implementations of the transport API.
Minor differences between the actual lines of code in the various
transport adapters are due to minor optimizations, such as hard-coding
'udp' as the only valid transport type for the N3xx series.
This change moves the implementation of the transport API calls
(get_chdr_link_options() and get_chdr_link_types()) into
PeriphManagerBase. The class attributes _xport_adapter_mgrs is also
declared in that class, but defining them is left up to the individual
device implementations.
This is a set of strings, each of which describe features the FPGA has.
The purpose of this is to provide a standard location to store knowledge
about available features. Typically, the code will read the compat
numbers to see if a feature is available, and then store a corresponding
string in this set.
XportMgrUDP.get_chdr_link_options() now also returns the interface name
(e.g., sfp0) in its return values, which is very useful for identifying
a transport in a different context (e.g., when only the node_inst value
of a transport is known).
This is a class that allows handling compat numbers as a type:
>>> cn = CompatNumber(4, 3)
>>> print(cn.major)
4
>>> cn < CompatNumber(4, 5)
True
>>> cn == CompatNumber(4.3)
True
This code was copy/pasta'd from N3x0. In theory, X410 can have more
options regarding streaming than UDP, although for now, this function
returns the exact same as before, it's just no longer hard coded.
This commit reverts the changes made in commit 81a9cc1f8 to reduce the
time for the LMK PLL to report lock status. The decision to revert the
change comes after an investigation found that reducing the overall time
to detect lock correlates with an increase in an error reported by the
TDC ('[ERROR] TDC measurements show a wide range of values! Check your
clock rates for incompatibilities. ... Uncaught exception in method
set_clock_source: TDC measurement out of expected range!'). Despite the
LMK PLL reporting lock status, our investigation revealed that it takes
additional time for the PLL to align the daughterboards' clocks closely
enough to pass the TDC measurement's range limit (i.e., no samples
exceeding the measurement mean +/- 500 ps). Reverting the change
increases the amount of time between achieving lock status and taking
the TDC measurements, thus greatly reducing the likelihood of the
reported error.
In commit bc8713e7af the SPI functionality was made available
conditionally depending on the FPGA version number. For this,
all SPI entries were removed from the X4XX_GPIO_SRC_RADIO variable
and put into an own variable. But therefore SPI was not available
anymore as valid source for GPIO. This change reintroduces SPI and
thus enables the SPI functionality again.
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Add the Filter API to n3xx specifically for the AD937x device. The TX
filter is limited to 32 taps, and the RX filter is limited to 48 taps.
This feature requires MPM version 4.2 or later on the device.
Co-authored-by: bpadalino <bpadalino@gmail.com>
Signed-off-by: mattprost <matt.prost@ni.com>
Allow users to control the Mykonos frontend bandwidth settings for
Rx and Tx. Note that this operation requires the daughterboard to
re-initialize, so it may take some time. Values for frontend filter
settings were derived using ADI's AD9371 Filter Wizard.
This feature requires MPM version 4.1 or later on the device.
Co-authored-by: bpadalino <bpadalino@gmail.com>
Signed-off-by: mattprost <matt.prost@ni.com>
Add support for reading the number of supported SPI slaves from
the device. This has become necessary because we may have bitfiles
with different capabilities and we want to report this back correctly.
In f73e327, we modified PeriphManagerBase to explicitly list all
required methods as per the MPM/UHD API. This had an unintended side
effect: Because the clocking methods on x4xx are imported from
X4xxClockMgr, and not defined on x4xx itself, the method used to import
methods from X4xxClockMgr onto x4xx would refuse to re-define API calls
such as set_clock_source(), get_clock_source(), and so on.
The solution is to allow _add_public_methods() to overwrite existing
methods, which means we can overwrite abstract methods from
PeriphManagerBase in this fashion.
Without this patch, UHD sessions could fail in the following manner:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=x4xx")
>>> U.get_clock_source(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_clock_source(0)
RuntimeError: RuntimeError: Error during RPC call to `get_clock_source'.
Error message: get_clock_source() not available on this device!
get_sync_sources() was not implemented for E31x and E320. Because UHD
assumes this exists, calling this would cause an error like this:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=e3xx")
>>> U.get_sync_sources(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_sync_sources(0)
RuntimeError: rpc::timeout: Timeout of 2000ms while calling RPC function
'get_sync_sources'
All PeriphManagerBase childs need to implement
- get_{clock,time,sync}_source()
- get_{clock,time,sync}_sources()
- set_{clock,time,sync}_source()
So we populate PeriphManagerBase with defaults for all of those.
Currently, the default clock/time source is whatever the user configured
in the last session.
This fixes the scenario were you have any MPM device and do this:
$ benchmark_rate --args $args,clock_source=external
But whoops! You forgot to attach an external 10 MHz. PLL lock fails,
nothing works. No worries, you run it again:
$ benchmark_rate --args $args
With the previous behaviour, this would retain the setting to
'external', because there's nothing to overwrite it. You would need to
append `clock_source=internal` to get a working device again. Calling
multi_usrp::set_clock_source("internal"), or a similar API call, might
not be sufficient because the PLL lock failure might crash the program
before updating the clock source is possible.
The problem with this is twofold:
- All non-MPM devices behave differently, i.e., they have a fixed
default ('internal') which is always applied if no other option is
given. This is an internal inconsistency.
- Some applications (like gr-uhd's GRC bindings) simply don't set
a clock/time source when selecting a "default", or they try and update
the clock/time source using the API calls.
Therefore, we align the behaviour of MPM devices with the other devices,
and fall back to an internal source if nothing else is provided.
The E31x and E320 devices have one virtual daughterboard, and it is
always present. This is different from N3xx, which is where the MPM code
for these devices is based upon.
During the E3xx initialization, we make sure that our single
"daughterboard" exists and is responsive. That means we can remove some
code that tests for the availability and number of daughterboards, which
we need on N3xx (which works with zero, one, or two daughterboards).
This also allows us some minor deduplication of code.
This commit uses a more performant buffered I/O approach for reading the
gpsd socket. Previously, querying a gps mboard sensor on an mpm radio
would take 300-500ms due to the loop reading one byte at a time.
The ref_locked mboard sensor on the n320 always returned true without
querying hardware. On this device family, mboard sensor callback in
n3xx.py returns the "and" of its daughterboard LMK PLLs by querying the
get_ref_lock() function on each dboard manager. However, that function
only existed for the Magnesium daughterbaord. For the Rhodium
daughterboard, the function didn't exist and so a true value was
automatically returned.
This commit adds the get_ref_lock() implementations for Rhodium and
EISCAT daughterboards, which are identical to the implementation
already present for Magnesium.
Co-authored-by: Martin Braun <martin.braun@ettus.com>
The FSRU (aka EISCAT) was never supported in UHD 4.0. The FPGA
repository never had the relevant files, and the block controller also
never existed. This removes all the corresponding files from MPM, as
well as some references from makefiles.
Change the --to argument to --to-destination. Both seem to work, but the
latter is what is listed in iptables-extensions(8). What's confusing is
that `--to` also exists in another context (in the `string` match
extension).
set_gpio_src takes a list of twelve sources to apply to the pins. For
the DIO mapping, this is fine, because the twelve pins are zero through
eleven. However, for the HDMI mapping, the pin indices range from one
to nineteen. This commit adds a function to convert from the set_gpio_src
list indices into the pin number.
MPM devices currently do not report their device name in the discovery
process. This adds the device name. After the change the device name
is reported, e.g. when using uhd_find_devices, like so:
$> uhd_find_devices
--------------------------------------------------
-- UHD Device 0
--------------------------------------------------
Device Address:
serial: DEADBEEF
claimed: False
fpga: X4_200
mgmt_addr: <mpm device ip>
name: <mpm device host name>
product: x410
type: x4xx
When the minor FPGA compat number on the device is ahead of what MPM
expects, we no longer print a warning. That's because by definition, the
FPGA is still compatible with the software in this case.
If UHD or MPM require a certain minor compat number to enable a feature,
the appropriate behaviour would be to print a warning only for that
case.
The LO-locked sensors on these devices were getting routed to the MPM
API call get_lo_lock_sensor(), which takes a 'which' argument (rx or
tx). However, UHD wants to pass a 'chan' argument (0 or 1). The way the
code was structured, it would always return 'False' (LO not locked) when
the argument was neither 'rx' or 'tx'.
The solution is to add get_rx_lo_lock_sensor() and
get_tx_lo_lock_sensor(), which generate the appropriate 'which'
argument, but discard the 'chan' argument (there is only one LO per Tx
and Rx, respectively).
In UHD 3, we had two sensors names for LO lock on these devices:
lo_lock, and lo_locked. The latter is the more standard, and is checked
in examples like rx_samples_to_file.
In UHD 4, the latter was removed without comment. This adds the sensor
back again and also updates the documentation accordingly.
Older DIO boards don't support all the features of newer ones, but from
the log messages, it's not clear what revision the board has. We add
a log statement to clarify.
No functional changes whatsoever, only:
- Move DioControl to its own module (x4xx_dio_control.py)
- Where PyLint was complaining about whitespace issues, fix those
- Fix import list in x4xx_periphs.py after removing DioControl
- Fix import list in x4xx.py to import DioControl from the correct
location
The X4x0 MPM code doesn't always load the object for the DIO control, it
only does that when certain checks pass (EEPROM readouts need to match
expected values). Therefore, `self.dio_control` may be NoneObject during
operations, and in other areas of the code, we already check if that's
the case.
The APIs added in c36fc5f don't have these checks, which means accessing
these new APIs may result in odd exceptions when trying to dereference
a NoneType object. By adding checks for the initialization state of
`self.dio_control`, we can avoid these and either substitute better
error messages / exception messages, or return safe values.
Note that mpmd_mb_controller also accesses this object indirectly by
checking the length of the return value of get_gpio_banks(). This check
is not affected by this change, as we now are guaranteed to return an
empty list if there is no self.dio_control.
