This change adds a flag to the clock policy that tells the sample PLL to
enable or disable the PLL ref clock (PRC) that goes to the
daughterboards. While for X410 the PRC is required, future USRPs may not
want the clock signal to propagate to the board.
This by itself does not enable dual-rate (or multi-mcr), but it
refactors the code to enable it in the future. Additional changes may be
required.
X4xxClockMgr is renamed to X4xxClockManager.
Before this change, x4xx_rfdc_ctrl.py had various backdoors to read out
required settings. Now that we have the clock policy object, we can
simply read them out from there.
This obviates some code paths (get_rfdc_resampling_factor(),
get_default_mcr(), set_rfdc_reset_cb()).
On tear_down() (this is most commonly seen by users when updating the
FPGA image), we add a check to verify that subcomponents of the X4xx are
actually initialized, to avoid displaying a non-fatal error message that
looks like this:
[ERROR] [MPM.RPCServer] Error in update_component while resetting:
'NoneType' object has no attribute 'tear_down'
The most common/easy way to trigger this error is by loading MPM with
a bitfile that has an invalid compat number (which would stop MPM from
initializing the RFDC controls) and then running `uhd_image_loader`
(which would force a tear_down()). In that circumstance, MPM would try
to call tear_down() on an uninitialized object.
This fixes two issues:
- RfdcRegsControl.enable_iq_swap() now is consistent with other APIs in
that it takes a channel number, not a block ID
- X4xxDboardIface.enable_iq_swap() doesn't use a backdoor API call to
fish the enable_iq_swap() API out of the _rfdc_regs object that it
doesn't own
- Add class-level attributes to store constants on the chips
- LMK04832X4xx.config() is changed use a SpllConfig object, which is
temporarily defined in x4xx_clk_mgr.py before calling config()
This change updates the call to the MB CPLD CTRL and adds logic to
distinguish between X410 and other USRPs, so that we can only force a
wrong CPLD image on a given device.
This adds a new synchronization step in the MPMD device initialization.
- Add API calls to PeriphManagerBase and rpc.py (synchronize() and
aggregate_sync_data())
- Add sane default implementations to PeriphManagerBase
Note: This adds new APIs to MPM, but we won't change the compat number
in this commit, since the new API is not yet being used.
The X4x0 device is an outlier with respect to all other MPM devices when
it comes to this API. All other MPM-devices define this API on the
daughterboard, not the motherboard.
For all the reasons laid out in dboard_manager/base.py, we move this API
call for X4x0 also into the daughterboard RPC space.
Both get_master_clock_rate() and set_master_clock_rate() are explicitly
declared @no_rpc in MPM.
This is an API breakage in the UHD/MPM communication API.
Main changes:
- x4xx_mb_cpld.MboardCPLD is renamed to X4xxMboardCPLD and is now a base
class. Specific implementations of the MB CPLD require derived classes
and have to provide their corresponding signature.
- In x4xx.py, we don't init the MB CPLD and then assert we have
a specific signature. Instead, we init the MB CPLD, and choose
a derived class based on the signature. If there is no such class,
then the same error is generated as before (by itself, this means
there is no behavioural change).
- The MB CPLD image for the X410 (ZBX daughterboards) is moved to
a derived class X410MboardCPLD.
- New: The ZBX daughterboard driver verifies that the MB CPLD image is
in fact compatible with the daughterboard. For this, the MB CPLD
control classes require a COMPATIBLE_DB_PIDS attribute.
By itself, this change has no behavioural- or API changes. However, it
allows easily slotting in new CPLD images with different signatures.
Without further modifications, it does not allow *any* CPLD image
though: The PS API (e.g., enable/disable daughterboards, CMI status,
etc.) remain the same.
For the sake of completeness, the bitfields and register offsets defined
for interacting with the MB CPLD are matched with the HDL definitions,
even for registers that aren't being used by MPM at this moment.
Method to get the lock status of the GPS sensor should be
get_gps_lock_sensor
instead of
get_gps_locked_sensor
Changing this conforms the x4xx with other USRPs and also
makes the call in get_gps_sensor_status executable at all.
We currently do not set the calibration mode during ADC self
calbration. The default mode is selected in Vivado configuration.
Nevertheless we have seen issues where not setting the mode
lead to poor results in ADC self calibration.
This commit enable the RPC to call the set_calibration_mode
which was already implemented in our RFDC lib.
Currently the E320's integrated GPSDO can be disabled using the
"enable_gps" argment at MPM initialization time (e.g. when the radio
powers on and launches the MPM daemon). However, there is no way for
a UHD application to disable the GPSDO at connection time.
This patch allows the existing "enable_gps" arg to be accepted when
initiating an MPM session from UHD, such that an application can pass
the arg "enable_gps=0" at connection time to disable the GPSDO. The
default power state of the GPSDO is restored when the session ends.
Edit: On top of the original commit by draeman-synoptic, the MPM minor
compat number was also increased to denote new non-breaking feature
support.
Co-authored-by: mattprost <matt.prost@ni.com>
Signed-off-by: mattprost <matt.prost@ni.com>
This reverts the Raw UDP host changes which is breaking
multiple interface streaming.
Commits addb81aa5d2d6adcd3a0c7a8d59fcd96af0c1ec4^..b1ca51f97aaa2226ed6ef339fb26fbea54ab7593
are reverted.
Reverts:
doc: Update manual on streaming
examples: Add remote RX streaming example
rfnoc: Enable remote UDP streaming
mpm: e320: Enable raw UDP streaming
mpm: n3xx: Enable raw UDP streaming
mpm: x4xx: Enable transport manager adapter
mpm: Enable opt-in transport adapter control
rfnoc: Transition stream managers and mgmt_portal to topo_graph_t
rfnoc: Add topology graph object
uhd/mpm: Add API to set remote routes
mpm: xports: Add XportAdapterMgr class
- Checks FPGA compat number is 6.1
- If so, it enables the transport adapter manager
- Note that E320 may still have raw UDP streaming feature disabled. In
that case, it simply doesn't report that capability.
- Checks if the compat number is at least 8.1
- If so, enables the transport adapter managers
- Note N3xx FPGA may still not have raw UDP streaming enabled, in which
case that capability is simply not reported.
This is an addition to both PeriphManagerBase (MPM) and mb_iface (UHD).
Main changes:
- Addition of mb_iface::add_remote_chdr_route() and
mb_iface::get_chdr_xport_adapters()
- In X3x0, these APIs are stubbed out.
- In mpmd, these APIs are implemented and call the new MPM APIs (see
below)
- Addition of PeriphManagerBase.add_remote_chdr_route() and
PeriphManagerBase.get_chdr_xport_adapters()
- The PeriphManagerBase implements these APIs fully when the
'remote_udp_streaming' FPGA feature is detected.
- The MPM compat number is bumped to 4.3. UHD will continue to work with
lower compat numbers. It will query the compat number and act
accordingly.
All MPM devices use identical implementations of the transport API.
Minor differences between the actual lines of code in the various
transport adapters are due to minor optimizations, such as hard-coding
'udp' as the only valid transport type for the N3xx series.
This change moves the implementation of the transport API calls
(get_chdr_link_options() and get_chdr_link_types()) into
PeriphManagerBase. The class attributes _xport_adapter_mgrs is also
declared in that class, but defining them is left up to the individual
device implementations.
This is a set of strings, each of which describe features the FPGA has.
The purpose of this is to provide a standard location to store knowledge
about available features. Typically, the code will read the compat
numbers to see if a feature is available, and then store a corresponding
string in this set.
This code was copy/pasta'd from N3x0. In theory, X410 can have more
options regarding streaming than UDP, although for now, this function
returns the exact same as before, it's just no longer hard coded.
In commit bc8713e7af the SPI functionality was made available
conditionally depending on the FPGA version number. For this,
all SPI entries were removed from the X4XX_GPIO_SRC_RADIO variable
and put into an own variable. But therefore SPI was not available
anymore as valid source for GPIO. This change reintroduces SPI and
thus enables the SPI functionality again.
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Add support for reading the number of supported SPI slaves from
the device. This has become necessary because we may have bitfiles
with different capabilities and we want to report this back correctly.
In f73e327, we modified PeriphManagerBase to explicitly list all
required methods as per the MPM/UHD API. This had an unintended side
effect: Because the clocking methods on x4xx are imported from
X4xxClockMgr, and not defined on x4xx itself, the method used to import
methods from X4xxClockMgr onto x4xx would refuse to re-define API calls
such as set_clock_source(), get_clock_source(), and so on.
The solution is to allow _add_public_methods() to overwrite existing
methods, which means we can overwrite abstract methods from
PeriphManagerBase in this fashion.
Without this patch, UHD sessions could fail in the following manner:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=x4xx")
>>> U.get_clock_source(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_clock_source(0)
RuntimeError: RuntimeError: Error during RPC call to `get_clock_source'.
Error message: get_clock_source() not available on this device!
get_sync_sources() was not implemented for E31x and E320. Because UHD
assumes this exists, calling this would cause an error like this:
>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=e3xx")
>>> U.get_sync_sources(0)
Traceback (most recent call last):
File "<input>", line 1, in <module>
U.get_sync_sources(0)
RuntimeError: rpc::timeout: Timeout of 2000ms while calling RPC function
'get_sync_sources'
