From bbd43b16e18ef0a0311ddf4635cbd29c4ac3c367 Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Tue, 8 Sep 2020 10:48:52 -0500 Subject: [PATCH] fpga: e31x: Change image file to e310_rfnoc_image_core This renames e31x_rfnoc_image_core.* to e310_rfnoc_image_core.*. This makes the naming consistent with the rest of the build process (which uses "e310" for all variants of e31x) and fixes an issue in which the wrong file name was used by rfnoc_image_builder. --- fpga/usrp3/top/e31x/Makefile | 2 +- .../{e31x_rfnoc_image_core.v => e310_rfnoc_image_core.v} | 8 ++++---- ...31x_rfnoc_image_core.yml => e310_rfnoc_image_core.yml} | 0 3 files changed, 5 insertions(+), 5 deletions(-) rename fpga/usrp3/top/e31x/{e31x_rfnoc_image_core.v => e310_rfnoc_image_core.v} (98%) rename fpga/usrp3/top/e31x/{e31x_rfnoc_image_core.yml => e310_rfnoc_image_core.yml} (100%) diff --git a/fpga/usrp3/top/e31x/Makefile b/fpga/usrp3/top/e31x/Makefile index a2ab64f1d..80752d738 100644 --- a/fpga/usrp3/top/e31x/Makefile +++ b/fpga/usrp3/top/e31x/Makefile @@ -26,7 +26,7 @@ ifndef TARGET endif TOP ?= e31x -DEFAULT_IMAGE_CORE_FILE_E31X=e31x_rfnoc_image_core.v +DEFAULT_IMAGE_CORE_FILE_E31X=e310_rfnoc_image_core.v DEFAULT_EDGE_FILE_E31X=$(abspath e310_static_router.hex) # vivado_build($1=Device, $2=Definitions) diff --git a/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.v b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.v similarity index 98% rename from fpga/usrp3/top/e31x/e31x_rfnoc_image_core.v rename to fpga/usrp3/top/e31x/e310_rfnoc_image_core.v index 2f035d524..9b288ad16 100644 --- a/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.v +++ b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.v @@ -1,5 +1,5 @@ // -// Copyright 2019 Ettus Research, A National Instruments Brand +// Copyright 2020 Ettus Research, A National Instruments Brand // // SPDX-License-Identifier: LGPL-3.0-or-later // @@ -7,9 +7,9 @@ // Module: rfnoc_image_core (for e31x) // This file was autogenerated by UHD's image builder tool (rfnoc_image_builder) // Re-running that tool will overwrite this file! -// File generated on: 2019-11-08T15:58:15.219909 -// Source: ./e31x/e31x_rfnoc_image_core.yml -// Source SHA256: 48e2907163bf8462812f33b7cf995da37c44d9652ba3afa38c510910a2365c05 +// File generated on: 2020-09-08T10:54:16.062742 +// Source: e310_rfnoc_image_core.yml +// Source SHA256: 00908abb846aaf175d1f8f2e75c6d39a3cd4958b326ab3125f4a1023c7b78b39 module rfnoc_image_core #( parameter [15:0] PROTOVER = {8'd1, 8'd0} diff --git a/fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml b/fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml similarity index 100% rename from fpga/usrp3/top/e31x/e31x_rfnoc_image_core.yml rename to fpga/usrp3/top/e31x/e310_rfnoc_image_core.yml