mirror of
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Preparing branch for 3.14.0.0 Release
- Updated CHANGELOG - Updated fpga-src submodule - Updated version info - Updated manifest
This commit is contained in:
michael-west
parent
3fb8cfe96c
commit
abf0db4ef3
4 changed files with 204 additions and 16 deletions
190
CHANGELOG
190
CHANGELOG
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@ -1,6 +1,194 @@
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Change Log for Releases
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==============================
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## 003.014.000.000
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* N320: Add N320 and N321
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* Test: Add Python API test
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* Device3: Move from packet-based to byte-based flow control
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* X300: Reduce default send_frame_size to 4000 over Ethernet
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* UHD: Release recv buffers earlier in rx_streamer
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* Device3: Constrain send_buff_size to input fifo size
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* X300: Change Ethernet buffering
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* MPMD: Parallelize broadcast-finding
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* Device: Parallelize device discovery
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* Docs: Fix Doxygen warnings
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* B100: Move fifo_ctrl_excelsior to b100 subdir
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* B100: Fix fifo_ctrl_excelsior not exiting
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* B100: Remove all Boostisms from fifo_ctrl_excelsior
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* B100: Demote some clocking-related log messages to trace
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* X300: Log git hash and compat number as debug message
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* N310: Modify AD9371 reset function to keep it in reset
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* N3xx: clocking API changes for transitioning clock and time sources
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* E320: bist: Fix ref_clock lock test implementation
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* UHD: Fix ADF400x driver for ref counter and charge pump mode
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* E320: bist: Add link_up test
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* MPM: Get list of temperatures from all thermal zones
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* E320: Add all 5 temp sensors, fan sensor and rssi sensors per channel
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* E320: Fix tx/rx atr - antenna and frequency settings
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* E320: Enable devtest for E320
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* X300: Move defaults to their own header
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* UHD: Improve constrained_device_args_t
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* X300: Use constrained_args
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* X300: Enable clock_source and time_source device args
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* Test: Integrate Python API Tester into Devtest
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* N3xx: Bump max rev to G/6
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* N3xx: Improve error messages for invalid clock/time settings
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* E320: images: Separate images package for Aurora image
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* B200: Remove superfluous fake lambda
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* B200: Add support for user regs
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* Docs: Add info on how to implement user regs on B200
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* UHD API: Add multi_usrp::get_user_settings_iface()
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* N310: move init_rf_cal before JESD de/framer bringup
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* UHD: Remove usage of time_t (except when required)
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* NIRIO: Demote RPC client cancel/abort to TRACE
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* RFNoC: Convert SR_READBACK_REG_FIFOSIZE to bytes
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* Utils: Add Zip test to downloader
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* Utils: Factor wait_for_lo_lock() out of cal utils
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* DPDK: Add DPDK-based sockets-like library
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* MPMD: add option to enum rfnoc blocks from args
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* E320: Get RFNoC crossbar baseport from FPGA
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* N3xx: Get RFNoC crossbar baseport from FPGA
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* UHD: add default xport params to udp_zero_copy
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* MPM: add link_speed xport_info
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* MPMD: add link speed to xport udp
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* Device3: remove tx_hint[send_buff_size]
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* X300: remove default_buff_args properties
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* RFNoC: Add ability to enable/disable RX timestamp
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* RFNoC: add async message handler
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* Examples: add rfnoc_radio_loopback example
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* UHD: Update rx_frontend_gen3.v controls for 1/4-rate mixer
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* UHD API: Move definition of ALL_MBOARDS and ALL_CHANS constants to
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CPP file.
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* MPM: Add __mpm_device__ as usrp_hwd module variable
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* MPM: Add usrp_update_fs
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* UHD: Add traffic counter to null source sink
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* Examples: Add benchmark_streamer example
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* Tools: Add tool to analyze settling time of gain and freq changes
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* UHD API: Add multi_usrp::set_sync_source() API
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* UHD: Improve documentation for the UHD exception types
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* Examples: Add dual measurements to benchmark_streamer
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* MPM: Add i2c APIs for simple transfers
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* MPM: Add vector-based transfer function for i2c
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* UHD: Improve documentation for set_{time,clock,sync}_source
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* CMake: Bump CMake minimum version to 2.8.12
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* MPM: Add variable configuration support to nijesdcore
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* MPM: Add eyescan utility to nijesdcore
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* MPM: Add PRBS-31 testing to nijesdcore
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* CMake: Change SOVERSION and VERSION for the library files
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* Test: Add graph impl test to device3_test
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* RFNoC: Changes to traffic counter register names
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* X300: Remove 120 MHz master_clock_rate option
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* MPM: Add convenience function to pull i2c bus from device tree
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* UHD: add .clang-format file
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* MPM: Open and close i2c file descriptor on every access
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* UHD: Add device arg to enable dual ethernet for tx
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* Test: Retrofit sph test to use new mock transport
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* X300: Set minimum master clock rate to 184.32 MHz
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* RFNoC: Fix replay example port args
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* RFNoC: Fix default SPP for replay
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* RFNoC: Add halt to replay API
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* UHD API: Add sync source to Python API
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* Examples: Clean up rfnoc_radio_loopback example
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* UHD: Improve compatibility of abs() calls
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* UHD: include <stdint.h> for int64_t for time_spec
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* USRP-2974: Add support for USRP-2974
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* UHD API: Add support for Tx LO control to C API
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* E310: Fix initialization of antenna and frequency values
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* Test: Enable rx_samples_to_file in devtest for X300
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* Examples: Add keyboard controls to rx_ascii_art_dft
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* Examples: Add benchmark_streamer support for multi-channel streamer
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* MPM: Multiprocessing instead of threading for claimer loop
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* MPM: Factor out user EEPROM code into own module
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* RFNoC: Fix late packet errors
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* X300: Factor our PID -> MB type and MB type -> product name mapping
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* X300: Remove usage of boost::bind
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* Docs: Add manual page on compat numbers
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* UHD: Updates to coding guidelines
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* Examples: Optimize benchmark_rate start time
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* Examples: Improve formatting and comments in tx_waveforms
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* Examples: Optimize tx_waveforms memory allocations
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* UHD: Fix MSVC warnings by changing a size_t to unsigned int or
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uint32_t
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* Test: Fix CMake `endif` warning for devtest
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* MPM: Add gpgga sensor function to GPSd iface
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* Test: Fix compiler warning about unused timestamp
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* X300: Fix compiler warnings related to type conversions
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* B200: Fix compiler warnings related to type conversions
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* Test: Add #include <thread> in system time test
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* Examples: change boost to std for time commands
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* UHD: Add potentially missing but sometimes inferred include for
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experts
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* UHD: Add default xport params to udp_wsa_zero_copy
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* Examples: Add LO Offset to rx_samples_to_file
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* Examples: update lo-offset naming in tx from file
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* Examples: Add lo-offset to tx_waveforms
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* UHD: Move device3 flow control functions to header for benchmark
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utility
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* Test: Add benchmark of streaming code paths
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* MPMD: Add API to set RPC timeout atomically
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* MPMD: Move timeout constants to header
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* MPMD: Use new RPC API with timeout
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* MPMD: Increase claim_rpc call timeout
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* Examples: Improved error message in tx_waveforms
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* UHD: Make sure BOOST_VERSION is always available
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* Docs: Add comments for TwinRX and MCR
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* DPDK: Add ARP responder, set MTU, and clean up API
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* DPDK: Add blocking recv calls to uhd-dpdk
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* DPDK: Add dpdk_zero_copy transport
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* Test: Add unit test for DPDK transport
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* Test: Add arguments to dpdk_test to control core mapping
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* DPDK: Move uhd-dpdk header to uhdlib
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* UHD: Make clang-format skip formatting for some data structures
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* UHD: Remove vim hints in headers
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* Examples: Move ascii_art_dft main function within include guard
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* UHD/MPM: Apply clang-format to all files
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* UHD: Add modified clang-format for headers
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* MPM: Add bridge mode support
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* RFNoC: Fix detection of outstanding acks by ctrl_iface
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* UHD: Replace uhd::math::log2 with std::log2
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* UHD: Replace boost::*::{lcm,gcd}() with portable versions
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* UHD API: Change get_{tx/rx}_dc_offset_range default from ALL_CHANS
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to 0
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* UHD: Revert to boost instead of std for sleep in some instances
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* UHD: Replace Boost macros with custom ones for endianness
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* MPMD: implement get_*x_hints
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* MPMD: honor user supplied send/recv_frame_size args
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* UHD: muxed_zero_copy_if fixes
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* Examples: Fix boundary condition in ascii_art_dft plotting
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* CMake: Extend list of additional Boost versions
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* Device3: Replace NULL with 0 for empty function pointers
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* RFNoC: Add some missing virtual destructors
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* Test: replace has_key by using 'in'
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* Test: Add universal_newlines to subprocess call in devtest
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* MPMD: Use 4096 bytes for frame size for liberio transport
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* DPDK: Add xport_mgr for dpdk_zero_copy
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* DPDK: Cover all paths to request TX offloads
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* Test: Fix up dpdk_test to use current APIs
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* MPM: Parameterize max UDP link allocation
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* UHD: Replace Boost lock & mutex with std variety for AD9361 code
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* CPack: Fix RPM generation
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* Utils: Add check for gdb_eeprom before accessing
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* RFNoC: Update FIFO XML definition
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* MPMD: Use init timeout for update_component
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* Docs: Add manual page for DPDK
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* Docs: Add information about what dpdk_zero_copy is doing
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* Tools: Make the UHD source gen a plugin for the phase alignment test
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* CMake: fix variable usage
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* RFNoC: Prevent unnecessary FC ACK packets
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* RFNoC: More graph traversal fixes
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* Device3: Remove redundant function call
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* RFNoC: Fix scaling of M and N values in DDC/DUC
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* X300: Fix tick and sample rate setting
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* RFNoC: Fix typos in legacy_compat
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* RFNoC: Limit number of control packets in flight
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* Device3: Fix flow control window and interval
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* E3xx: Increase spp limit for E3xx radio
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* E31x: Destruct RFNoC before loading idle image
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* N3xx: init peripherals before loading FPGA (to fix SFP0 init issues)
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* N3xx: Move Linux kernel to 4.15
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* N3xx/E320: Prepend SDK filename with device name
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* N310: Fix sporadic power on failures (requires firmware update)
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## 003.013.001.000
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* E320: Fix front panel GPIO readback
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* E320: Fix master_clock_rate setting
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@ -40,7 +228,7 @@ Change Log for Releases
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* BasicRX/LFRX: Fix real mode in rx_frontend_core_3000
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* UHD: Define UHD_API as empty string when building static lib
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* UHD: Changed to 'all_matching' endpoint resolution for udp_simple transport
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* UHD: Add support for NEON SIMD
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* UHD: Add CMake flag for NEON SIMD
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* UHD: Fix usb_dummy_impl compilation in MSVC
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* UHD: Reconcile time_spec operators with boost concepts
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* UHD: Fix rounding in ddc/duc rate calculation
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2
fpga-src
2
fpga-src
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@ -1 +1 @@
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Subproject commit f2151e8101bee4ae21680ab90065d3549ab721c0
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Subproject commit e57dfe075c8056a5afe5528c1bc21e92b5149379
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@ -21,7 +21,7 @@ set(UHD_VERSION_MAJOR 3)
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set(UHD_VERSION_API 14)
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set(UHD_VERSION_ABI 0)
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set(UHD_VERSION_PATCH 0)
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set(UHD_VERSION_DEVEL TRUE)
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set(UHD_VERSION_DEVEL FALSE)
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########################################################################
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# If we're on a development branch, we skip the patch version
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@ -1,24 +1,24 @@
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# UHD Image Manifest File
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# Target hash url SHA256
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# X300-Series
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x3xx_x310_fpga_default fpga-f2151e8 x3xx/fpga-f2151e8/x3xx_x310_fpga_default-gf2151e8.zip 8b29c780d9d6d2f4ab438b407d833eafdadc48c0fc6ef9916d1d34a21f6e8712
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x3xx_x300_fpga_default fpga-f2151e8 x3xx/fpga-f2151e8/x3xx_x300_fpga_default-gf2151e8.zip fb1c1462a75b9dde43d6772337b24cb3dc72f8473aa15a01fc8339a0db557547
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x3xx_x310_fpga_default fpga-e57dfe0 x3xx/fpga-e57dfe0/x3xx_x310_fpga_default-ge57dfe0.zip 97d225bbe686179aa674caf25ecdd8198c7b4301b1e0368ab9f40f09d69e6169
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x3xx_x300_fpga_default fpga-e57dfe0 x3xx/fpga-e57dfe0/x3xx_x300_fpga_default-ge57dfe0.zip 37db8ecbcb20a1d11323e0f68b78fd8443ff4006da6add9090f53b71e5464989
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# Example daughterboard targets (none currently exist)
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#x3xx_twinrx_cpld_default example_target
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#dboard_ubx_cpld_default example_target
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# E-Series
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e3xx_e310_fpga_default fpga-f2151e8 e3xx/fpga-f2151e8/e3xx_e310_fpga_default-gf2151e8.zip 1da1be4c8d0fb852a57340d453dbe35c69badadc756d7394ed8c8e82616a2212
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e3xx_e310_fpga_default fpga-e57dfe0 e3xx/fpga-e57dfe0/e3xx_e310_fpga_default-ge57dfe0.zip 4cd3444c99681dbe3da4f2466c11f9572324a733eb4fddc3293db16a63e4e4a7
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e3xx_e310_fpga_rfnoc fpga-d6a878b e3xx/fpga-d6a878b/e3xx_e310_fpga_rfnoc-gd6a878b.zip 5c9b89fb6293423644868c22e914de386a9af39ff031da6800a1cf39a90ea73b
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e3xx_e320_fpga_default fpga-f2151e8 e3xx/fpga-f2151e8/e3xx_e320_fpga_default-gf2151e8.zip 2fe87708364936b6f0f7cd8b186c1382739699dd0f646d4055c3b3fc11a31f99
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e3xx_e320_fpga_default fpga-e57dfe0 e3xx/fpga-e57dfe0/e3xx_e320_fpga_default-ge57dfe0.zip 5d263e734e55658c1cee01717d45e6a26c03f73a221d1babc93937a9e1cc10cb
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# E320 Filesystems, etc
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e3xx_e320_sdk_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_sdk_default-v3.13.0.2.zip 0
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e3xx_e320_mender_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_mender_default-v3.13.0.2.zip 0
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e3xx_e320_sdimg_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_sdimg_default-v3.13.0.2.zip 0
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# N300-Series
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n3xx_n310_fpga_default fpga-f2151e8 n3xx/fpga-f2151e8/n3xx_n310_fpga_default-gf2151e8.zip 21747c046cd63ef5e4f3a425af22da0e502e67fb6685f32381125c5f5e1a59c2
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n3xx_n300_fpga_default fpga-f2151e8 n3xx/fpga-f2151e8/n3xx_n300_fpga_default-gf2151e8.zip 436978bb4d68f560348b6d612acabbb3c76b37846b4fa6e43411f4a29b913826
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n3xx_n320_fpga_default fpga-c41506b n3xx/fpga-c41506b/n3xx_n320_fpga_default-gc41506b.zip af6b4fcf28caee9de96e865f705541657d04a8abf2cf383dacf1640e1bbfaafb
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n3xx_n310_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n310_fpga_default-ge57dfe0.zip 70d7af1261a77545b611f6ffd00e4c3507791ee07e0e6a7ec0e92f98be64c419
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n3xx_n300_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n300_fpga_default-ge57dfe0.zip 13f81bf7c22763fe814fee3d2c592d1c11360a42bfe9b133d0f5f3f4c5f9edad
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n3xx_n320_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n320_fpga_default-ge57dfe0.zip f39f9ad15457a34b4329c528db61495aeac652a3eccf0e8061a294a238ab3979
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n3xx_n310_cpld_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_cpld_default-g6bea23d.zip ef128dcd265ee8615b673021d4ee84c39357012ffe8b28c8ad7f893f9dcb94cb
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# N3XX Mykonos firmware
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#n3xx_n310_fw_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fw_default-g6bea23d.zip 0
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@ -28,11 +28,11 @@ n3xx_common_mender_default meta-ettus-v3.13.0.2 n3xx/meta-ettus-v3.13.0.2/
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n3xx_common_sdimg_default meta-ettus-v3.13.0.2 n3xx/meta-ettus-v3.13.0.2/n3xx_common_sdimg_default-v3.13.0.2.zip 0
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# B200-Series
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b2xx_b200_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b200_fpga_default-gf2151e8.zip 0d3f693b8a567a4b098ac4fd0a57fe1bb94205b2f1d181079158cb04714384a7
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b2xx_b200mini_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b200mini_fpga_default-gf2151e8.zip db3bd2776053c388b20e0731641372af6b005834b40ddf7076477b808225a05a
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b2xx_b210_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b210_fpga_default-gf2151e8.zip be9637ffeaa067a3a8719639dfd62a9e1106f50a772abcc74e5d8c7728d0ee89
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b2xx_b205mini_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b205mini_fpga_default-gf2151e8.zip e1413d27c10b56d1427e364b0931799300e7e6c2749ba20d5dcef5c9892341a1
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b2xx_common_fw_default uhd-455a288 b2xx/uhd-455a288/b2xx_common_fw_default-g455a288.zip ac53d8bf9cda7508cb3ee09d190de08495ba9e519279e77f9927eccc953144f6
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b2xx_b200_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b200_fpga_default-ge57dfe0.zip ea5cec1dd1909bf52fb269eb1e25790bf75027595a957689233f8191917cbea7
|
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b2xx_b200mini_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b200mini_fpga_default-ge57dfe0.zip 2fda5cadb4b682296430f3458a51da8bab6d78992fa3f4f7c7a863fe78dfb6dd
|
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b2xx_b210_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b210_fpga_default-ge57dfe0.zip b6badaa782b6240cfa9cf21f2c816787f059ce2a6177976e0cc9f9c23c95d9ef
|
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b2xx_b205mini_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b205mini_fpga_default-ge57dfe0.zip 72d4349041b32e1f071dfae613953c84bb2249f9f05241e2283b767f25d6e486
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b2xx_common_fw_default uhd-a69ab0c b2xx/uhd-a69ab0c/b2xx_common_fw_default-ga69ab0c.zip 4c791308be0a66c28c77bc45941b22de5142861b6adefb33b333fc33d035382f
|
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|
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# USRP2 Devices
|
||||
usrp2_usrp2_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_usrp2_fw_default-g6bea23d.zip d523a18318cb6a7637be40484bf03a6f54766410fee2c1a1f72e8971ea9a9cb6
|
||||
|
|
@ -41,7 +41,7 @@ usrp2_n200_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n20
|
|||
usrp2_n200_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n200_fw_default-g6bea23d.zip 3eee2a6195caafe814912167fccf2dfc369f706446f8ecee36e97d2c0830116f
|
||||
usrp2_n210_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fpga_default-g6bea23d.zip 5ce68ac539ee6eeb7d04fb3127c1fabcaff442a8edfaaa2f3746590f9df909bd
|
||||
usrp2_n210_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fw_default-g6bea23d.zip 3646fcd3fc974d18c621cb10dfe97c4dad6d282036dc63b7379995dfad95fb98
|
||||
n230_n230_fpga_default fpga-f2151e8 n230/fpga-f2151e8/n230_n230_fpga_default-gf2151e8.zip 2ad7a86959692a95a2c9023a091f24e3a6eadc5f11537ae7b77c0a547ce91c28
|
||||
n230_n230_fpga_default fpga-e57dfe0 n230/fpga-e57dfe0/n230_n230_fpga_default-ge57dfe0.zip f115b78a1893da0c2a481257351b834721f8a5468dfae6a34e3a68a3bc0065cd
|
||||
|
||||
# USRP1 Devices
|
||||
usrp1_usrp1_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_usrp1_fpga_default-g6bea23d.zip 03bf72868c900dd0853bf48e2ede91058d579829b0e70c021e51b0e282d1d5be
|
||||
|
|
|
|||
Loading…
Reference in a new issue