From 7de96848df063d2f019f4efb4e9a300bce42f033 Mon Sep 17 00:00:00 2001 From: Wade Fife Date: Mon, 28 Nov 2022 10:08:17 -0600 Subject: [PATCH] mpm: rfdc: Add X4xx 125e6 master clock rate --- mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py | 1 + 1 file changed, 1 insertion(+) diff --git a/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py b/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py index 6dca79b2a..a6709736a 100644 --- a/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py +++ b/mpm/python/usrp_mpm/periph_manager/x4xx_rfdc_ctrl.py @@ -56,6 +56,7 @@ class X4xxRfdcCtrl: 122.88e6*4: (2.94912e9, 2, False, False), # RF (1M-8G) 122.88e6*2: (2.94912e9, 2, False, True), # RF (1M-8G) 122.88e6*1: (2.94912e9, 8, False, False), # RF (1M-8G) + 125e6*1: (3.00000e9, 8, False, False), # RF (1M-8G) 125e6*2: (3.00000e9, 2, False, True), # RF (1M-8G) 125e6*4: (3.00000e9, 2, False, False), # RF (1M-8G) 200e6: (3.00000e9, 4, True, False), # RF (Legacy Mode)