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rfnoc: Replace DDC/DUC YAML variants with single version

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This commit is contained in:
Wade Fife 2019-11-08 10:32:48 -06:00 committed by Martin Braun
parent 8ae60e342b
commit 72e833e7bb
4 changed files with 10 additions and 144 deletions
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8
host/include/uhd/rfnoc/blocks/ddc_1x64.yml → host/include/uhd/rfnoc/blocks/ddc.yml
View file

@ -33,20 +33,20 @@ data:
fpga_iface: axis_data
clk_domain: ce
inputs:
in_0:
in:
num_ports: NUM_PORTS
item_width: 32
nipc: 1
info_fifo_depth: 5
info_fifo_depth: 32
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
outputs:
out_0:
out:
num_ports: NUM_PORTS
item_width: 32
nipc: 1
info_fifo_depth: 5
info_fifo_depth: 32
payload_fifo_depth: MTU
format: int32
mdata_sig: ~

68
host/include/uhd/rfnoc/blocks/ddc_2x64.yml
View file

@ -1,68 +0,0 @@
schema: rfnoc_modtool_args
module_name: ddc
version: 1.0
rfnoc_version: 1.0
chdr_width: 64
noc_id: 0xDDC00000
parameters:
NUM_PORTS: 2
NUM_HB: 3
CIC_MAX_DECIM: 255
clocks:
- name: rfnoc_chdr
freq: "[]"
- name: rfnoc_ctrl
freq: "[]"
- name: ce
freq: "[]"
control:
sw_iface: nocscript
fpga_iface: ctrlport
interface_direction: slave
fifo_depth: 32
clk_domain: ce
ctrlport:
byte_mode: False
timed: False
has_status: False
data:
fpga_iface: axis_data
clk_domain: ce
inputs:
in_0:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
in_1:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
outputs:
out_0:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
out_1:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
registers:
properties:

10
host/include/uhd/rfnoc/blocks/duc_1x64.yml → host/include/uhd/rfnoc/blocks/duc.yml
View file

@ -33,18 +33,20 @@ data:
fpga_iface: axis_data
clk_domain: ce
inputs:
in_0:
in:
num_ports: NUM_PORTS
item_width: 32
nipc: 1
info_fifo_depth: 5
info_fifo_depth: 32
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
outputs:
out_0:
out:
num_ports: NUM_PORTS
item_width: 32
nipc: 1
info_fifo_depth: 5
info_fifo_depth: 32
payload_fifo_depth: MTU
format: int32
mdata_sig: ~

68
host/include/uhd/rfnoc/blocks/duc_2x64.yml
View file

@ -1,68 +0,0 @@
schema: rfnoc_modtool_args
module_name: duc
version: 1.0
rfnoc_version: 1.0
chdr_width: 64
noc_id: 0xD0C00000
parameters:
NUM_PORTS: 2
NUM_HB: 3
CIC_MAX_INTERP: 255
clocks:
- name: rfnoc_chdr
freq: "[]"
- name: rfnoc_ctrl
freq: "[]"
- name: ce
freq: "[]"
control:
sw_iface: nocscript
fpga_iface: ctrlport
interface_direction: slave
fifo_depth: 32
clk_domain: ce
ctrlport:
byte_mode: False
timed: False
has_status: False
data:
fpga_iface: axis_data
clk_domain: ce
inputs:
in_0:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
in_1:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
outputs:
out_0:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
out_1:
item_width: 32
nipc: 1
info_fifo_depth: 5
payload_fifo_depth: MTU
format: int32
mdata_sig: ~
registers:
properties: