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tools: Add FPGA functional verification tests for N32x
This commit adds FPGA functional verification tests for all the N320 images. The tests follow a similar pattern to N310, but one additional category is present for using the DPDK transport. In order to use that test, the use_dpdk and mgmt_addr args must be specified in the options.
This commit is contained in:
Alex Williams
Ashish Chaudhari
parent
255a1d31ac
commit
014610a93d
1 changed files with 167 additions and 0 deletions
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@ -32,6 +32,61 @@ from six import iteritems
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FUNCVERIF_SETTINGS = {
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# Every key corresponds to one target that can be run. The key is the
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# command line argument.
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'n320_1gige': {
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# These arguments will be passed to every run of benchmark_rate, unless
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# overriden.
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# Strings get expanded, so we can use Python string expansion here.
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# If something does not start with two dashes (--foo), then we keep it
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# as a string expansion argument. For example, the {master_clock_rate}
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# in the following string gets expanded from the master_clock_rate key/
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# value pair further down.
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'--args': "type=n3xx,addr={second_addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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'--drop-threshold': 0,
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'--underrun-threshold': 100,
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'--overrun-threshold': 100,
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'--rx_subdev': 'A:0 B:0',
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'--tx_subdev': 'A:0 B:0',
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'--duration': 60,
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# __tests is a special key, it contains a list of dicts, which in turn
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# describe the details of the test. len(__tests) equals the number of
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# tests that get executed.
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'__tests': [
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# Any command line argument (i.e., a key that starts with two
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# dashes) is also appended to the call to benchmark_rate. It will
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# override arguments that were listed above. This lets you, e.g.,
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# override --duration (see further down).
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--rx_rate': 2.5e6, '--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--rx_rate': 2.4576e6, '--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--rx_rate': 2e6, '--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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],
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},
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'n310_1gige': {
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# These arguments will be passed to every run of benchmark_rate, unless
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# overriden.
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@ -156,6 +211,73 @@ FUNCVERIF_SETTINGS = {
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{'--rx_rate': 1.536e6, '--tx_rate': 1.536e6, 'master_clock_rate': '153.6e6', '--channels': '0,1',},
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],
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},
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'n320_10gige': {
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'--args': "type=n3xx,addr={addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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'--drop-threshold': 0,
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'--underrun-threshold': 100,
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'--overrun-threshold': 100,
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'--rx_subdev': 'A:0 B:0',
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'--tx_subdev': 'A:0 B:0',
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'--duration': 60,
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'__tests': [
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--rx_rate': 125e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--rx_rate': 125e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--rx_rate': 122.88e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--rx_rate': 122.88e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--rx_rate': 200e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--rx_rate': 200e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--tx_rate': 125e6, 'master_clock_rate': '250e6', '--channels': 0,},
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{'--tx_rate': 125e6, 'master_clock_rate': '250e6', '--channels': 1,},
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{'--tx_rate': 122.88e6, 'master_clock_rate': '245.76e6', '--channels': 0,},
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{'--tx_rate': 122.88e6, 'master_clock_rate': '245.76e6', '--channels': 1,},
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{'--tx_rate': 100e6, 'master_clock_rate': '200e6', '--channels': 0,},
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{'--tx_rate': 100e6, 'master_clock_rate': '200e6', '--channels': 1,},
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{'--rx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--rx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--rx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--rx_rate': 125e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--rx_rate': 122.88e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--rx_rate': 100e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--tx_rate': 62.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--tx_rate': 61.44e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--tx_rate': 100e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--rx_rate': 2.5e6, '--tx_rate': 2.5e6, 'master_clock_rate': '250e6', '--channels': '0,1',},
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{'--rx_rate': 2.4576e6, '--tx_rate': 2.4576e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',},
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{'--rx_rate': 2e6, '--tx_rate': 2e6, 'master_clock_rate': '200e6', '--channels': '0,1',},
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{'--rx_rate': 125e6, '--tx_rate': 62.5e6, 'master_clock_rate': '250e6', '--channels': '0,1', '--duration': 3600,},
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{'--rx_rate': 122.88e6, '--tx_rate': 61.44e6, 'master_clock_rate': '245.76e6', '--channels': '0,1', '--duration': 3600,},
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{'--rx_rate': 100e6, '--tx_rate': 66.67e6, 'master_clock_rate': '200e6', '--channels': '0,1', '--duration': 3600,},
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],
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},
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'n310_10gige': {
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'--args': "type=n3xx,addr={addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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@ -351,6 +473,42 @@ FUNCVERIF_SETTINGS = {
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{'--rx_rate': 76.8e6, '--tx_rate': 76.8e6, 'master_clock_rate': '153.6e6', '--channels': '0,1', '--duration': 3600,},
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],
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},
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'n320_2x_10gige': {
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'--args': "type=n3xx,addr={addr},second_addr={second_addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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'--drop-threshold': 0,
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'--underrun-threshold': 100,
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'--overrun-threshold': 100,
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'--rx_subdev': 'A:0 B:0',
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'--tx_subdev': 'A:0 B:0',
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'--duration': 60,
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'__tests': [
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{'--rx_rate': 125e6, '--tx_rate': 83.33e6, 'master_clock_rate': '250e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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{'--rx_rate': 122.88e6,'--tx_rate': 81.92e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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{'--rx_rate': 200e6, '--tx_rate': 100e6, 'master_clock_rate': '200e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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],
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},
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'n320_2x_10gige_dpdk': {
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'--args': "type=n3xx,addr={addr},second_addr={second_addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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'--drop-threshold': 0,
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'--underrun-threshold': 100,
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'--overrun-threshold': 100,
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'--rx_subdev': 'A:0 B:0',
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'--tx_subdev': 'A:0 B:0',
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'--duration': 60,
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'__tests': [
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{'--rx_rate': 250e6, '--tx_rate': 250e6, 'master_clock_rate': '250e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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{'--rx_rate': 245.76e6,'--tx_rate': 245.76e6, 'master_clock_rate': '245.76e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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{'--rx_rate': 200e6, '--tx_rate': 200e6, 'master_clock_rate': '200e6', '--channels': '0,1',
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'--duration': 3600, '--underrun-threshold': 1000, '--overrun-threshold': 1000,},
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],
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},
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'n310_2x_10gige': {
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'--args': "type=n3xx,addr={addr},second_addr={second_addr},master_clock_rate={master_clock_rate},{args}",
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'--seq-threshold': 0,
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@ -600,12 +758,21 @@ DEV_TO_TEST = {
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'n310ha': ['n310_1gige'],
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'n310xa': ['n310_10gige'],
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'n310wx': ['n310_10gige'],
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'n320xg': ['n320_10gige', 'n320_2x_10gige'],
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'n320hg': ['n320_1gige', 'n320_10gige'],
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'n320xq': ['n320_10gige', 'n320_2x_10gige'],
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'n320aq': ['n320_10gige', 'n320_2x_10gige'],
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'n320wx': ['n320_10gige'],
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'n300_1gige': ['n300_1gige'],
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'n300_10gige': ['n300_10gige'],
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'n300_2x_10gige': ['n300_2x_10gige'],
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'n310_1gige': ['n310_1gige'],
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'n310_10gige': ['n310_10gige'],
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'n310_2x_10gige': ['n310_2x_10gige'],
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'n320_1gige': ['n320_1gige'],
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'n320_10gige': ['n320_10gige'],
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'n320_2x_10gige': ['n320_2x_10gige'],
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'n320_2x_10gige_dpdk': ['n320_2x_10gige_dpdk'],
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#x300
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'x3x0hg': ['x3x0_1gige', 'x3x0_10gige', 'x3x0_pcie'],
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'x3x0xg': ['x3x0_10gige', 'x3x0_2x_10gige', 'x3x0_pcie'],
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