2010-05-10 22:14:48 +00:00
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//
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// Copyright 2010 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#include "codec_ctrl.hpp"
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#include "ad9777_regs.hpp"
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#include "usrp2_regs.hpp"
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#include <boost/cstdint.hpp>
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#include <boost/foreach.hpp>
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#include <iostream>
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static const bool codec_ctrl_debug = false;
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using namespace uhd;
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/*!
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* A usrp2 codec control specific to the ad9777 ic.
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*/
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class codec_ctrl_impl : public codec_ctrl{
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public:
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codec_ctrl_impl(usrp2_iface::sptr iface){
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_iface = iface;
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//setup the ad9777 dac
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_ad9777_regs.x_1r_2r_mode = ad9777_regs_t::X_1R_2R_MODE_1R;
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_ad9777_regs.filter_interp_rate = ad9777_regs_t::FILTER_INTERP_RATE_4X;
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_ad9777_regs.mix_mode = ad9777_regs_t::MIX_MODE_REAL;
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_ad9777_regs.pll_divide_ratio = ad9777_regs_t::PLL_DIVIDE_RATIO_DIV1;
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_ad9777_regs.pll_state = ad9777_regs_t::PLL_STATE_OFF;
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_ad9777_regs.auto_cp_control = ad9777_regs_t::AUTO_CP_CONTROL_ENB;
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//I dac values
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_ad9777_regs.idac_fine_gain_adjust = 0;
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_ad9777_regs.idac_coarse_gain_adjust = 0xf;
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_ad9777_regs.idac_offset_adjust_lsb = 0;
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_ad9777_regs.idac_offset_adjust_msb = 0;
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//Q dac values
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_ad9777_regs.qdac_fine_gain_adjust = 0;
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_ad9777_regs.qdac_coarse_gain_adjust = 0xf;
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_ad9777_regs.qdac_offset_adjust_lsb = 0;
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_ad9777_regs.qdac_offset_adjust_msb = 0;
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//write all regs
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for(boost::uint8_t addr = 0; addr <= 0xC; addr++){
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2010-05-10 23:37:12 +00:00
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this->send_ad9777_reg(addr);
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2010-05-10 22:14:48 +00:00
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}
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//power-up adc
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_iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_ON);
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}
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~codec_ctrl_impl(void){
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//power-down dac
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_ad9777_regs.power_down_mode = 1;
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2010-05-10 23:37:12 +00:00
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this->send_ad9777_reg(0);
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2010-05-10 22:14:48 +00:00
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//power-down adc
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_iface->poke32(FR_MISC_CTRL_ADC, FRF_MISC_CTRL_ADC_OFF);
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}
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private:
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ad9777_regs_t _ad9777_regs;
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usrp2_iface::sptr _iface;
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void send_ad9777_reg(boost::uint8_t addr){
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boost::uint16_t reg = _ad9777_regs.get_write_reg(addr);
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if (codec_ctrl_debug) std::cout << "send_ad9777_reg: " << std::hex << reg << std::endl;
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_iface->transact_spi(
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SPI_SS_AD9777, spi_config_t::EDGE_RISE,
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2010-05-10 23:37:12 +00:00
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reg, 16, false /*no rb*/
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2010-05-10 22:14:48 +00:00
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);
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}
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};
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/***********************************************************************
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* Public make function for the usrp2 codec control
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**********************************************************************/
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codec_ctrl::sptr codec_ctrl::make(usrp2_iface::sptr iface){
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return sptr(new codec_ctrl_impl(iface));
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}
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