2010-04-13 19:42:23 +00:00
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//
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// Copyright 2010 Ettus Research LLC
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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2010-05-10 22:14:48 +00:00
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#include "clock_ctrl.hpp"
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2010-04-13 19:42:23 +00:00
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#include "ad9510_regs.hpp"
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#include "usrp2_regs.hpp" //spi slave constants
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#include <boost/cstdint.hpp>
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2010-04-17 05:10:35 +00:00
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using namespace uhd;
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2010-04-13 19:42:23 +00:00
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/*!
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* A usrp2 clock control specific to the ad9510 ic.
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*/
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2010-05-10 22:14:48 +00:00
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class clock_ctrl_impl : public clock_ctrl{
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2010-04-13 19:42:23 +00:00
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public:
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2010-05-10 22:14:48 +00:00
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clock_ctrl_impl(usrp2_iface::sptr iface){
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2010-04-14 00:48:48 +00:00
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_iface = iface;
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2010-04-13 21:23:36 +00:00
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_ad9510_regs.cp_current_setting = ad9510_regs_t::CP_CURRENT_SETTING_3_0MA;
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this->write_reg(0x09);
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2010-04-13 23:47:31 +00:00
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// Setup the clock registers to 100MHz:
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// This was already done by the firmware (or the host couldnt communicate).
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// We could remove this part, and just leave it to the firmware.
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// But why not leave it in for those who want to mess with clock settings?
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// 100mhz = 10mhz/R * (P*B + A)
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2010-04-13 21:23:36 +00:00
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_ad9510_regs.pll_power_down = ad9510_regs_t::PLL_POWER_DOWN_NORMAL;
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_ad9510_regs.prescaler_value = ad9510_regs_t::PRESCALER_VALUE_DIV2;
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this->write_reg(0x0A);
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_ad9510_regs.acounter = 0;
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this->write_reg(0x04);
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_ad9510_regs.bcounter_msb = 0;
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_ad9510_regs.bcounter_lsb = 5;
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this->write_reg(0x05);
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this->write_reg(0x06);
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_ad9510_regs.ref_counter_msb = 0;
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_ad9510_regs.ref_counter_lsb = 1; // r divider = 1
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this->write_reg(0x0B);
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this->write_reg(0x0C);
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/* regs will be updated in commands below */
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this->enable_external_ref(false);
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2010-04-13 19:42:23 +00:00
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this->enable_rx_dboard_clock(false);
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this->enable_tx_dboard_clock(false);
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2010-04-13 23:47:31 +00:00
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/* private clock enables, must be set here */
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this->enable_dac_clock(true);
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this->enable_adc_clock(true);
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2010-04-13 19:42:23 +00:00
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}
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2010-05-10 22:14:48 +00:00
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~clock_ctrl_impl(void){
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2010-04-13 23:47:31 +00:00
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/* private clock enables, must be set here */
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2010-04-14 00:48:48 +00:00
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this->enable_dac_clock(false);
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this->enable_adc_clock(false);
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2010-04-13 19:42:23 +00:00
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}
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2010-04-13 23:47:31 +00:00
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//uses output clock 7 (cmos)
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2010-04-13 19:42:23 +00:00
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void enable_rx_dboard_clock(bool enb){
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_ad9510_regs.power_down_lvds_cmos_out7 = enb? 0 : 1;
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_ad9510_regs.lvds_cmos_select_out7 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT7_CMOS;
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_ad9510_regs.output_level_lvds_out7 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT7_1_75MA;
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this->write_reg(0x43);
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this->update_regs();
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}
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2010-04-13 23:47:31 +00:00
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//uses output clock 6 (cmos)
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2010-04-13 19:42:23 +00:00
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void enable_tx_dboard_clock(bool enb){
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_ad9510_regs.power_down_lvds_cmos_out6 = enb? 0 : 1;
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_ad9510_regs.lvds_cmos_select_out6 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT6_CMOS;
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_ad9510_regs.output_level_lvds_out6 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT6_1_75MA;
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this->write_reg(0x42);
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this->update_regs();
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}
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2010-04-13 21:23:36 +00:00
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/*!
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* If we are to use an external reference, enable the charge pump.
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* \param enb true to enable the CP
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*/
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void enable_external_ref(bool enb){
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_ad9510_regs.charge_pump_mode = (enb)?
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ad9510_regs_t::CHARGE_PUMP_MODE_NORMAL :
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ad9510_regs_t::CHARGE_PUMP_MODE_3STATE ;
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_ad9510_regs.pll_mux_control = ad9510_regs_t::PLL_MUX_CONTROL_DLD_HIGH;
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_ad9510_regs.pfd_polarity = ad9510_regs_t::PFD_POLARITY_POS;
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this->write_reg(0x08);
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this->update_regs();
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}
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2010-04-13 19:42:23 +00:00
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private:
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/*!
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* Write a single register to the spi regs.
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* \param addr the address to write
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*/
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void write_reg(boost::uint8_t addr){
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boost::uint32_t data = _ad9510_regs.get_write_reg(addr);
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2010-04-14 00:48:48 +00:00
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_iface->transact_spi(SPI_SS_AD9510, spi_config_t::EDGE_RISE, data, 24, false /*no rb*/);
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2010-04-13 19:42:23 +00:00
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}
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/*!
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* Tells the ad9510 to latch the settings into the operational registers.
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*/
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void update_regs(void){
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_ad9510_regs.update_registers = 1;
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this->write_reg(0x5a);
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}
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2010-04-13 23:47:31 +00:00
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//uses output clock 3 (pecl)
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void enable_dac_clock(bool enb){
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_ad9510_regs.power_down_lvpecl_out3 = (enb)?
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ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_NORMAL :
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ad9510_regs_t::POWER_DOWN_LVPECL_OUT3_SAFE_PD;
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_ad9510_regs.output_level_lvpecl_out3 = ad9510_regs_t::OUTPUT_LEVEL_LVPECL_OUT3_810MV;
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this->write_reg(0x3F);
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this->update_regs();
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}
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//uses output clock 4 (lvds)
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void enable_adc_clock(bool enb){
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_ad9510_regs.power_down_lvds_cmos_out4 = enb? 0 : 1;
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_ad9510_regs.lvds_cmos_select_out4 = ad9510_regs_t::LVDS_CMOS_SELECT_OUT4_LVDS;
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_ad9510_regs.output_level_lvds_out4 = ad9510_regs_t::OUTPUT_LEVEL_LVDS_OUT4_1_75MA;
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this->write_reg(0x40);
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this->update_regs();
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}
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2010-04-14 00:48:48 +00:00
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usrp2_iface::sptr _iface;
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2010-04-13 19:42:23 +00:00
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ad9510_regs_t _ad9510_regs;
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};
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/***********************************************************************
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* Public make function for the ad9510 clock control
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**********************************************************************/
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2010-05-10 22:14:48 +00:00
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clock_ctrl::sptr clock_ctrl::make(usrp2_iface::sptr iface){
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return sptr(new clock_ctrl_impl(iface));
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2010-04-13 19:42:23 +00:00
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}
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