saymrwulf/stable-baselines3
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62 commits 18 branches 32 tags 5.2 MiB
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20 commits

Author SHA1 Message Date
Antonin Raffin
ab64ff464e Add tensorboard_log dummy arg 2019-10-14 11:09:22 +02:00
Antonin Raffin
b5656531d1 Enable logger for SAC/TD3 + refactor 2019-10-10 13:47:13 +02:00
Antonin Raffin
37ab9d10f1 Rescale actions and add action noise 2019-10-07 16:26:03 +02:00
Antonin Raffin
b4dc9d4e4d Add doc 2019-09-26 11:46:40 +02:00
Antonin Raffin
322399e8fe Update collect rollout 2019-09-25 13:20:06 +02:00
Antonin Raffin
32648d9029 Add docstrings 2019-09-24 15:30:58 +02:00
Antonin RAFFIN
2469ff3859 Reformat 2019-09-21 17:17:09 +02:00
Antonin Raffin
0e727a5f72 Full compat for VecEnv + bug fixes for cuda 2019-09-20 16:43:19 +02:00
Antonin RAFFIN
cc4380eccd Add eval env and clip vf 2019-09-19 17:18:41 +02:00
Antonin RAFFIN
6bb7e183d2 Running PPO (not working yet) 2019-09-18 15:35:17 +02:00
Antonin Raffin
2a660e9a41 Update closer to original implementation for CEMRL 2019-09-12 15:38:15 +02:00
Antonin Raffin
f04754afec Refactor for collecting rollout 2019-09-12 14:00:55 +02:00
Antonin Raffin
5e3a84d551 Refactor policies 2019-09-12 11:19:06 +02:00
Antonin Raffin
c3c87f8311 Add update styles for CEM-RL 2019-09-10 13:07:15 +02:00
Antonin Raffin
d22b66fc10 Fixes for CUDA support 2019-09-09 16:45:55 +02:00
Antonin Raffin
d333abe963 Remove stdout flush 2019-09-09 13:51:18 +02:00
Antonin Raffin
12431b0e92 Refactor: CEM-RL closer to TD3 implementation 2019-09-09 13:43:46 +02:00
Antonin Raffin
6cce61d183 Fix random exploration 2019-09-06 14:11:27 +02:00
Antonin Raffin
5e38080937 Code cleanup 2019-09-06 14:04:40 +02:00
Antonin Raffin
d4e2dc8a9c Add CEM-RL 2019-09-06 14:01:10 +02:00