Update torch-xpu-ops commit pin (#141201)

Update the torch-xpu-ops commit to [1e32bbc](1e32bbc3d9), includes:

- Improve XPU aten operator coverage
- Support basic `SparseXPU` operators

Pull Request resolved: https://github.com/pytorch/pytorch/pull/141201
Approved by: https://github.com/EikanWang, https://github.com/jansel

test/inductor/test_torchinductor_opinfo.py

@@ -269,7 +269,7 @@ inductor_expected_failures_single_sample["xpu"] = {
     "tan": {f16},
     "torch.ops.aten._flash_attention_forward": {f16},
     "torch.ops.aten._efficient_attention_forward": {f16, f32},
-    "to_sparse": {f16, f32, f64, b8, i32, i64},
+    "to_sparse": {f32, f64},
     "linalg.eig": {f32, f64},
     "linalg.eigvals": {f32, f64},
     # Double and complex datatype matmul is not supported in oneDNN
@@ -320,6 +320,7 @@ inductor_expected_failures_single_sample["xpu"] = {
     "linalg.qr": {f64},
     "linalg.pinv": {f64},
     ("linalg.pinv", "hermitian"): {f64},
+    ("linalg.pinv", "singular"): {f64},
     "linalg.norm": {f64},
     ("linalg.norm", "subgradients_at_zero"): {f64},
     "linalg.matrix_rank": {f64},
@@ -349,8 +350,6 @@ inductor_expected_failures_single_sample["xpu"] = {
     # a deconvolution forward propagation primitive
     "nn.functional.conv_transpose2d": {f32, f64},
     "nn.functional.conv_transpose3d": {f32, f64},
-    # frexp not supported on XPU now
-    "frexp": {f16, f32, f64},
     # not implemented for 'Half'
     "sort": {b8},
     "argsort": {b8},

third_party/xpu.txt

@@ -1 +1 @@
-bf4bab1ffffd84e5f747f65a17e08ee2fe633102
+1e32bbc3d9a68112299e02566cf4b174b89c24c9