mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-17 21:10:46 +00:00
176 lines
4.1 KiB
C
176 lines
4.1 KiB
C
/*
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* Copyright (C) 2019 ETH Zurich, University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __POS_IMPLEM_IRQ_H__
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#define __POS_IMPLEM_IRQ_H__
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#include "hal/pulp.h"
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void pos_irq_init();
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void rt_irq_set_handler(int irq, void (*handler)());
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static inline void rt_irq_mask_set(unsigned int mask)
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{
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#if defined(__RISCV_GENERIC__)
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// Generic riscv case, e.g. Ibex
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hal_spr_read_then_set_from_reg(0x304, mask);
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#elif defined(ITC_VERSION) && defined(EU_VERSION)
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// Case with ITC on FC and event unit on cluster, e.g. Wolfe
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if (hal_is_fc())
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hal_itc_enable_set(mask);
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else
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eu_irq_maskSet(mask);
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#elif defined(ITC_VERSION)
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// Case with only ITC, e.g. Pulpissimo
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hal_itc_enable_set(mask);
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#elif defined(EU_VERSION)
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// Case with only event unit, e.g. Gap
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eu_irq_maskSet(mask);
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// This is needed on architectures where the FC is using an event unit as we
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// use an elw instead of a wfi with interrupts disabled. The fact that the event
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// is active will make the core goes out of elw and the interrupt handler
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// will be called as soon as interrupts are enabled.
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if (hal_is_fc())
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eu_evt_maskSet(mask);
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#endif
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}
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static inline void rt_irq_mask_clr(unsigned int mask)
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{
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#if defined(__RISCV_GENERIC__)
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hal_spr_read_then_clr_from_reg(0x304, mask);
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#elif defined(ITC_VERSION) && defined(EU_VERSION)
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if (hal_is_fc())
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hal_itc_enable_clr(mask);
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else
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eu_irq_maskClr(mask);
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#elif defined(ITC_VERSION)
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hal_itc_enable_clr(mask);
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#elif defined(EU_VERSION)
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eu_irq_maskClr(mask);
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if (hal_is_fc())
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eu_evt_maskClr(mask);
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#endif
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}
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static inline void rt_irq_clr(unsigned int mask)
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{
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#if defined(__RISCV_GENERIC__)
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// TODO
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#elif defined(ITC_VERSION) && defined(EU_VERSION)
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if (hal_is_fc())
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hal_itc_status_clr(mask);
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else
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eu_evt_clr(mask);
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#elif defined(ITC_VERSION)
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hal_itc_status_clr(mask);
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#elif defined(EU_VERSION) && EU_VERSION >= 3
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eu_evt_clr(mask);
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#endif
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}
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static inline unsigned int rt_irq_get_fc_vector_base()
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{
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if (hal_is_fc())
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{
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#if defined(__RISCV_GENERIC__)
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return hal_spr_read(0x305) & ~1;
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#elif defined(ARCHI_CORE_HAS_SECURITY) && !defined(ARCHI_CORE_HAS_1_10)
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return hal_spr_read(SR_MTVEC);
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#elif defined(ARCHI_CORE_HAS_1_10)
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return hal_spr_read(SR_MTVEC) & ~1;
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#elif defined(APB_SOC_VERSION) && APB_SOC_VERSION >= 2
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return apb_soc_bootaddr_get();
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#endif
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}
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else
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{
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#if defined(ARCHI_HAS_CLUSTER)
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#if defined(__RISCV_GENERIC__)
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return hal_spr_read(0x305) & ~1;
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#elif defined(ARCHI_CORE_HAS_1_10)
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return hal_spr_read(SR_MTVEC) & ~1;
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#elif defined(ARCHI_CLUSTER_CTRL_ADDR)
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return plp_ctrl_bootaddr_get();
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#endif
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#endif
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}
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return 0;
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}
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static inline void rt_irq_set_fc_vector_base(unsigned int base)
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{
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if (hal_is_fc())
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{
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#if defined(__RISCV_GENERIC__)
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hal_spr_write(0x305, base);
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#elif defined(ARCHI_CORE_HAS_SECURITY)
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hal_spr_write(SR_MTVEC, base);
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#elif defined(ARCHI_CORE_HAS_1_10)
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hal_spr_write(SR_MTVEC, base | 1);
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#elif defined(APB_SOC_VERSION) && APB_SOC_VERSION >= 2
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apb_soc_bootaddr_set(base);
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#endif
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}
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else
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{
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#if defined(ARCHI_HAS_CLUSTER)
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#if defined(__RISCV_GENERIC__)
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hal_spr_write(0x305, base);
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#elif defined(ARCHI_CORE_HAS_1_10)
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hal_spr_write(SR_MTVEC, base | 1);
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#elif defined(ARCHI_CLUSTER_CTRL_ADDR)
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plp_ctrl_bootaddr_set(base);
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#endif
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#endif
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}
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}
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static inline void rt_irq_wait_for_interrupt()
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{
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#if !defined(ARCHI_HAS_FC) || defined(ARCHI_HAS_FC_EU)
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eu_evt_wait();
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#else
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hal_itc_wait_for_interrupt();
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#endif
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}
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#endif
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