mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-27 22:46:05 +00:00
86 lines
3 KiB
C
86 lines
3 KiB
C
// Generic Hardware Abstraction Layer for the GPIO peripheral
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#ifndef _GPIO_REG_DEFS_
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#define _GPIO_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Info register that contains information about this peripheral.
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#define GPIO_INFO_REG_OFFSET 0x0
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#define GPIO_INFO_REG_GPIO_CNT_MASK 0x3ff
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#define GPIO_INFO_REG_GPIO_CNT_OFFSET 0
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#define GPIO_INFO_REG_GPIO_CNT_FIELD \
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((bitfield_field32_t) { .mask = GPIO_INFO_GPIO_CNT_MASK, .index = GPIO_INFO_GPIO_CNT_OFFSET })
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#define GPIO_INFO_REG_VERSION_MASK 0x3ff
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#define GPIO_INFO_REG_VERSION_OFFSET 10
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#define GPIO_INFO_REG_VERSION_FIELD \
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((bitfield_field32_t) { .mask = GPIO_INFO_VERSION_MASK, .index = GPIO_INFO_VERSION_OFFSET })
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// Global configuration register for the peripheral
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#define GPIO_CFG_REG_OFFSET 0x4
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#define GPIO_CFG_INTRPT_MODE_BIT 0
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// Set the IO Mode of the GPIO. (common parameters)
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#define GPIO_MODE_REG_OFFSET_BASE 0x8
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#define GPIO_MODE_REG_VALUE_INPUT_ONLY 0x0
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#define GPIO_MODE_REG_VALUE_OUTPUT_ACTIVE 0x1
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#define GPIO_MODE_REG_VALUE_OPEN_DRAIN0 0x2
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#define GPIO_MODE_REG_VALUE_OPEN_DRAIN1 0x3
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// Enable sampling on the corresponding GPIO (common parameters)
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#define GPIO_EN_INPUT_REG_OFFSET_BASE 0x80
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// Read the current input values of all GPIOs.
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#define GPIO_INPUT_REG_OFFSET_BASE 0x100
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// Set the output value of the corresponding GPIOs.
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#define GPIO_OUTPUT_REG_OFFSET_BASE 0x180
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// For each asserted bit in this register, set the corresponding bit in the
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// padout register.
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#define GPIO_SET_REG_OFFSET_BASE 0x200
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// For each asserted bit in this register, clear the corresponding bit in the
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// padout register.
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#define GPIO_CLEAR_REG_OFFSET_BASE 0X280
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// For each asserted bit in this register, toggle the corresponding bit in
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// the padout register.
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#define GPIO_TOGGLE_REG_OFFSET_BASE 0X300
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// Enable Interrupts on rising edges for the corresponding GPIO
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#define GPIO_INTRPT_RISE_EN_REG_OFFSET_BASE 0x380
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// Enable Interrupts on falling edges for the corresponding GPIO
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#define GPIO_INTRPT_FALL_EN_REG_OFFSET_BASE 0x400
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// Enable logic high level-sensitive Interrupts on the corresponding GPIO
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#define GPIO_INTRPT_HIGH_EN_REG_OFFSET_BASE 0x480
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// Enable logic low level-sensitive Interrupts on the corresponding GPIO
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#define GPIO_INTRPT_LOW_EN_REG_OFFSET_BASE 0x500
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// Asserted if there is any pending interrupts on corresponding GPIOs.
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#define GPIO_INTRPT_STATUS_REG_OFFSET_BASE 0x580
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// Asserted if there is a pending rise interrupts on corresponding GPIOs.
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#define GPIO_INTRPT_RISE_STATUS_REG_OFFSET_BASE 0x600
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// Asserted if there is any pending fall interrupts on corresponding GPIOs.
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#define GPIO_INTRPT_FALL_STATUS_REG_OFFSET_BASE 0x680
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// Asserted if there is any pending high-level interrupts on corresponding
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// GPIOs.
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#define GPIO_INTRPT_LVL_HIGH_STATUS_REG_OFFSET_BASE 0x700
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// Asserted if there is any pending low-level interrupts on corresponding
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// GPIOs.
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#define GPIO_INTRPT_LVL_LOW_STATUS_REG_OFFSET_BASE 0x780
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _GPIO_REG_DEFS_
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// End generated register defines for gpio
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