mirror of
https://github.com/saymrwulf/pulp-runtime.git
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91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/*
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* Copyright (C) 2019 ETH Zurich, University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "pulp.h"
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#include <hal/pulp.h>
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#include <stdio.h>
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#include <stdlib.h>
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static unsigned int pos_irq_get_itvec(unsigned int ItBaseAddr, unsigned int ItIndex, unsigned int ItHandler)
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{
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/* Prepare 32bit container to be stored at
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*(ItBaseAddr+ItIndex) containing a relative jump from
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(ItBaseAddr+ItIndex) to Handler */
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unsigned int S = ((unsigned int) ItHandler - (ItBaseAddr+ItIndex*4));
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unsigned int R = 0x6F; /* Jal opcode with x0 as target, eg no return */
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/* Forge JAL x0, Address: with Address = S => Bin[31:0] = [S20
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| S10:1 | S11 | S19:12 | 00000 01101111] */
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R = __BITINSERT(R, __BITEXTRACT(S, 1, 20), 1, 31);
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R = __BITINSERT(R, __BITEXTRACT(S, 10, 1), 10, 21);
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R = __BITINSERT(R, __BITEXTRACT(S, 1, 11), 1, 20);
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R = __BITINSERT(R, __BITEXTRACT(S, 8, 12), 8, 12);
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return R;
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}
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void pos_irq_set_handler(int irq, void (*handler)())
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{
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#if defined(__RISCV_GENERIC__)
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if (irq < 16)
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return;
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irq -= 16;
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#endif
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unsigned int base = pos_irq_get_fc_vector_base();
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unsigned int jmpAddr = base + 0x4 * irq;
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*(volatile unsigned int *)jmpAddr = pos_irq_get_itvec(base, irq, (unsigned int)handler);
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//selective_flush_icache_addr(jmpAddr & ~(ICACHE_LINE_SIZE-1));
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//if (!rt_is_fc() || plp_pmu_cluster_isOn(0)) flush_all_icache_banks_common(plp_icache_cluster_remote_base(0));
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#if defined(PLP_FC_HAS_ICACHE)
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flush_all_icache_banks_common(plp_icache_fc_base());
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#endif
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}
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void pos_irq_illegal_instr()
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{
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//unsigned int mepc = hal_mepc_read();
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//rt_warning("Reached illegal instruction (PC: 0x%x, opcode: 0x%x\n", mepc, *(int *)mepc);
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}
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void pos_irq_init()
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{
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// We may enter the runtime with some interrupts active for example
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// if we force the boot to jump to the runtime through jtag.
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pos_irq_mask_clr(-1);
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// As the FC code may not be at the beginning of the L2, set the
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// vector base to get proper interrupt handlers
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pos_irq_set_fc_vector_base(pos_irq_vector_base());
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}
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