mirror of
https://github.com/saymrwulf/pulp-runtime.git
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82 lines
No EOL
2.9 KiB
C
82 lines
No EOL
2.9 KiB
C
/*
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* Copyright (C) 2018 ETH Zurich and University of Bologna
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __ARCHI_UDMA_UDMA_UART_V1_H__
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#define __ARCHI_UDMA_UDMA_UART_V1_H__
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// UART custom registers offset definition
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#define UART_STATUS_OFFSET (0x00)
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#define UART_SETUP_OFFSET (0x04)
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// UART custom registers bitfields offset, mask, value definition
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// STATUS
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#define UART_TX_BUSY_OFFSET 0
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#define UART_TX_BUSY_WIDTH 1
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#define UART_TX_BUSY_MASK (0x1 << UART_TX_BUSY_OFFSET)
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#define UART_TX_BUSY (0x1 << UART_TX_BUSY_OFFSET)
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#define UART_RX_BUSY_OFFSET 1
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#define UART_RX_BUSY_WIDTH 1
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#define UART_RX_BUSY_MASK (0x1 << UART_RX_BUSY_OFFSET)
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#define UART_RX_BUSY (0x1 << UART_RX_BUSY_OFFSET)
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#define UART_RX_PE_OFFSET 2
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#define UART_RX_PE_WIDTH 1
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#define UART_RX_PE_MASK (0x1 << UART_RX_PE_OFFSET)
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#define UART_RX_PE (0x1 << UART_RX_PE_OFFSET)
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// SETUP
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#define UART_PARITY_OFFSET 0
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#define UART_PARITY_WIDTH 1
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#define UART_PARITY_MASK (0x1 << UART_PARITY_OFFSET)
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#define UART_PARITY_DIS (0 << UART_PARITY_OFFSET)
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#define UART_PARITY_ENA (1 << UART_PARITY_OFFSET)
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#define UART_BIT_LENGTH_OFFSET 1
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#define UART_BIT_LENGTH_WIDTH 2
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#define UART_BIT_LENGTH_MASK (0x3 << UART_BIT_LENGTH_OFFSET)
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#define UART_BIT_LENGTH_5 (0 << UART_BIT_LENGTH_OFFSET)
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#define UART_BIT_LENGTH_6 (1 << UART_BIT_LENGTH_OFFSET)
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#define UART_BIT_LENGTH_7 (2 << UART_BIT_LENGTH_OFFSET)
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#define UART_BIT_LENGTH_8 (3 << UART_BIT_LENGTH_OFFSET)
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#define UART_STOP_BITS_OFFSET 3
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#define UART_STOP_BITS_WIDTH 1
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#define UART_STOP_BITS_MASK (0x1 << UART_STOP_BITS_OFFSET)
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#define UART_STOP_BITS_1 (0 << UART_STOP_BITS_OFFSET)
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#define UART_STOP_BITS_2 (1 << UART_STOP_BITS_OFFSET)
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#define UART_TX_OFFSET 8
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#define UART_TX_WIDTH 1
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#define UART_TX_MASK (0x1 << UART_TX_OFFSET)
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#define UART_TX_DIS (0 << UART_TX_OFFSET)
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#define UART_TX_ENA (1 << UART_TX_OFFSET)
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#define UART_RX_OFFSET 9
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#define UART_RX_WIDTH 1
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#define UART_RX_MASK (0x1 << UART_RX_OFFSET)
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#define UART_RX_DIS (0 << UART_RX_OFFSET)
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#define UART_RX_ENA (1 << UART_RX_OFFSET)
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#define UART_CLKDIV_OFFSET 16
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#define UART_CLKDIV_WIDTH 16
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#define UART_CLKDIV_MASK (0xffff << UART_CLKDIV_OFFSET)
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#define UART_CLKDIV(val) (val << UART_CLKDIV_OFFSET)
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#define ARCHI_UDMA_UART_RX_EVT 0
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#define ARCHI_UDMA_UART_TX_EVT 1
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#endif |