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Parametrized FC exclusion through a define.

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Luca Valente 2023-03-13 17:40:29 +01:00 committed by Yvan Tortorella
parent 1ddf10447c
commit f9c3d3a7d6
8 changed files with 72 additions and 69 deletions
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5
README.md
View file

@ -62,4 +62,7 @@ The uart can be selected for the printf with this option:
The baudrate can also be specified with:
$ make all run io=uart CONFIG_IO_UART_BAUDRATE=9600
$ make all run io=uart CONFIG_IO_UART_BAUDRATE=9600
It is possible to generate code that can be executed on a standalone PULP cluster by appending the `CONFIG_NO_FC` define when compiling the code:
$ make all CONFIG_NO_FC=1

43
include/archi/chips/pulp/properties.h
View file

@ -1,43 +1,3 @@
/*
* Copyright (C) 2018 ETH Zurich, University of Bologna
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __ARCHI_CHIPS_PULP_PROPERTIES_H__
#define __ARCHI_CHIPS_PULP_PROPERTIES_H__
/*
* FPGA
*/
#ifndef ARCHI_FPGA_PER_FREQUENCY
#define ARCHI_FPGA_PER_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_SOC_FREQUENCY
#define ARCHI_FPGA_SOC_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_CL_FREQUENCY
#define ARCHI_FPGA_CL_FREQUENCY 5000000
#endif
/*
* MEMORIES
*/
#define ARCHI_HAS_L2 1
#define ARCHI_HAS_L2_MULTI 1
#define ARCHI_HAS_L1 1
@ -285,6 +245,3 @@
#define ARCHI_FC_EVT_SCU_OK 25
#define ARCHI_FC_EVT_SOC_EVT 26
#define ARCHI_FC_EVT_QUEUE_ERROR 29
#endif

3
kernel/bench.c
View file

@ -131,7 +131,8 @@ int run_suite(testcase_t *tests)
errors += result.errors;
}
print_summary(errors);
if (rt_core_id() == 0)
print_summary(errors);
return errors;
}

4
kernel/chips/pulp/link.ld
View file

@ -3,8 +3,8 @@ OUTPUT_ARCH(riscv)
ENTRY( _start )
MEMORY
{
L2 : ORIGIN = 0x1c000004, LENGTH = 0x0007fffc
L1 : ORIGIN = 0x10000004, LENGTH = 0x0000fffc
L2 : ORIGIN = 0x1c000000, LENGTH = 0x0007fffc
L1 : ORIGIN = 0x10000000, LENGTH = 0x0000fffc
}
/*

20
kernel/chips/pulp/soc.c
View file

@ -19,15 +19,16 @@
void pos_soc_init()
{
#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
pos_fll_constructor();
pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
#ifndef ARCHI_NO_FC
pos_fll_constructor();
pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
#endif
#else
@ -39,4 +40,3 @@ void pos_soc_init()
#endif
}

32
kernel/cluster.c
View file

@ -18,14 +18,18 @@
#include <stdio.h>
#include <stdlib.h>
#ifndef ARCHI_NO_FC
#include "init.c"
#endif
volatile void *cluster_entry;
L1_DATA char *cluster_stacks;
static volatile int cluster_running;
static volatile int cluster_retval;
extern int main(int argc, const char * const argv[]);
static void pos_wait_forever()
{
@ -43,10 +47,21 @@ static void cluster_core_init()
eu_bar_setup(eu_bar_addr(0), (1<<ARCHI_CLUSTER_NB_PE) - 1);
}
// executed by the FC!
void cluster_entry_stub()
{
cluster_core_init();
#ifdef ARCHI_NO_FC
synch_barrier();
if(hal_core_id()==0)
cluster_start(hal_cluster_id(), main);
synch_barrier();
#endif
int retval = ((int (*)())cluster_entry)();
if (hal_core_id() == 0)
@ -64,35 +79,40 @@ void cluster_start(int cid, int (*entry)())
// Store cluster entry point, ctr0 will jump here
cluster_entry = entry;
// Init FLL
// Init FLL only if the FC is present
#ifndef ARCHI_NO_FC
pos_fll_init(POS_FLL_CL);
#endif
// Initialize cluster L1 memory allocator
alloc_init_l1(cid);
// Activate icache
hal_icache_cluster_enable(cid);
#ifdef ARCHI_NO_FC
if (!hal_is_fc())
{
cluster_core_init();
}
#endif
alloc_init_l1(cid);
cluster_stacks = pi_l1_malloc(cid, ARCHI_CLUSTER_NB_PE*CLUSTER_STACK_SIZE);
#ifdef ARCHI_NO_FC
if (cluster_stacks == NULL)
return;
cluster_running = 1;
// Fetch all cores
// Fetch all cores
for (int i=0; i<ARCHI_CLUSTER_NB_PE; i++)
{
plp_ctrl_core_bootaddr_set_remote(cid, i, (int)_start);
}
eoc_fetch_enable_remote(cid, (1<<ARCHI_CLUSTER_NB_PE) - 1);
#endif
}

24
kernel/crt0.S
View file

@ -27,11 +27,20 @@ pos_init_entry:
csrr a0, 0xF14
andi a1, a0, 0x1f
srli a0, a0, 5
#ifdef ARCHI_NO_FC
// Writing registers for cluster boot
li x2, 0x10200000
li x3, 0x1
la x4, _start
sw x4, 0x40(x2)
sw x3, 8(x2)
#else
#ifdef ARCHI_CL_BOOT
li a2, ARCHI_FC_CID
beq a0, a2, do_cl_boot
bnez a1, pe_start
li a2, ARCHI_FC_CID
j do_cl_boot
// beq a0, a2, do_cl_boot // FC will go there
// bnez a1, pe_start // cluster will go here
#else
@ -40,8 +49,9 @@ pos_init_entry:
bne a0, a2, pe_start
#else
bnez a1, pe_start
#endif
#endif
#endif // ARCHI_FC_ID
#endif // ARCHI_CL_BOOT
#endif // ARCHI_NO_FC
#endif
@ -159,7 +169,7 @@ pe_start:
addi a1, a1, 1
mul x1, x3, a1
add x2, x2, x1
j cluster_entry_stub
j cluster_entry_stub // fc will go here
#endif
do_cl_boot:
@ -168,6 +178,8 @@ do_cl_boot:
la x4, _start
sw x4, 0x40(x2)
sw x3, 8(x2)
li x2, 0x1a109800
sw x0, 0(x2)
loop:
li x2, 0x1a109800

10
kernel/init.c
View file

@ -58,6 +58,7 @@ void pos_init_start()
hal_pmu_bypass_set (ARCHI_REG_FIELD_SET (hal_pmu_bypass_get (), 1, 11, 1) );
#endif
if(hal_core_id()==0) {
pos_soc_init();
pos_irq_init();
@ -68,6 +69,7 @@ void pos_init_start()
// available for constructors, especially to let them declare
// callbacks
//__rt_utils_init();
pos_allocs_init();
// Call global and static constructors
@ -80,10 +82,18 @@ void pos_init_start()
// Now now the minimal init are done, we can activate interruptions
hal_irq_enable();
}
cluster_entry_stub();
if (!hal_is_fc())
{
cluster_start(hal_cluster_id(), main);
} else
{
cluster_entry_stub();
}
}