From 0782b2fee078fc9c974ba112216aa4c72b872091 Mon Sep 17 00:00:00 2001
From: Francesco Conti <f.conti@unibo.it>
Date: Tue, 16 Apr 2024 10:29:02 +0000
Subject: [PATCH 1/2] Align to QoL changes introduced previously in
 carfield-cluster

---
 rules/pulpos/targets/astral-cluster.mk | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/rules/pulpos/targets/astral-cluster.mk b/rules/pulpos/targets/astral-cluster.mk
index 5eec999..b88d627 100644
--- a/rules/pulpos/targets/astral-cluster.mk
+++ b/rules/pulpos/targets/astral-cluster.mk
@@ -1,4 +1,10 @@
+HOSTNAME := $(shell hostname)
+ETH_HOST = $(shell echo $(HOSTNAME) | grep -q "\.ee\.ethz\.ch$$" && echo 1 || echo 0)
+ifeq (ETH_HOST,1)
 QUESTA ?= questa-2022.3
+else
+QUESTA ?= 
+endif
 ifdef USE_IBEX
 PULP_LDFLAGS      +=
 PULP_CFLAGS       +=  -D__ibex__ -U__riscv__ -UARCHI_CORE_HAS_PULPV2 -DRV_ISA_RV32
@@ -73,5 +79,5 @@ ifndef gui
 vsim-flags = -c
 endif
 
-run:
-	$(QUESTA) vsim $(vsim-flags) -do "set  VSIM_PATH $(VSIM_PATH); source $(VSIM_PATH)/scripts/start.tcl"
+run: $(TARGETS)
+	cd $(TARGET_BUILD_DIR); $(QUESTA) vsim $(vsim-flags) -do "set  VSIM_PATH $(VSIM_PATH); source $(VSIM_PATH)/scripts/start.tcl"

From d8972b0f0cac72ba8889fe09aa9a319fee0a1519 Mon Sep 17 00:00:00 2001
From: Yvan Tortorella <ytortorella@lagrev3.ee.ethz.ch>
Date: Tue, 23 Apr 2024 13:58:55 +0200
Subject: [PATCH 2/2] Change L2 address.

---
 include/archi/chips/astral-cluster/memory_map.h | 8 ++++----
 kernel/chips/astral-cluster/link.ld             | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/archi/chips/astral-cluster/memory_map.h b/include/archi/chips/astral-cluster/memory_map.h
index 90f315d..729021e 100644
--- a/include/archi/chips/astral-cluster/memory_map.h
+++ b/include/archi/chips/astral-cluster/memory_map.h
@@ -23,14 +23,14 @@
  * MEMORIES
  */
 
-#define ARCHI_L2_PRIV0_ADDR  0x10000000
+#define ARCHI_L2_PRIV0_ADDR  0x78000000
 #define ARCHI_L2_PRIV0_SIZE  0x00008000
 
-#define ARCHI_L2_PRIV1_ADDR  0x10008000
+#define ARCHI_L2_PRIV1_ADDR  0x78008000
 #define ARCHI_L2_PRIV1_SIZE  0x00008000
 
-#define ARCHI_L2_SHARED_ADDR  0x80000000
-#define ARCHI_L2_SHARED_SIZE  0x10000000
+#define ARCHI_L2_SHARED_ADDR  0x78000000
+#define ARCHI_L2_SHARED_SIZE  0x002F0000
 
 
 /*
diff --git a/kernel/chips/astral-cluster/link.ld b/kernel/chips/astral-cluster/link.ld
index 742a040..303e63e 100644
--- a/kernel/chips/astral-cluster/link.ld
+++ b/kernel/chips/astral-cluster/link.ld
@@ -3,7 +3,7 @@ OUTPUT_ARCH(riscv)
 ENTRY( _start )
 MEMORY
 {
-  L2           : ORIGIN = 0x10000000, LENGTH = 0x00020000
+  L2           : ORIGIN = 0x78000000, LENGTH = 0x00020000
   L1           : ORIGIN = 0x50000000, LENGTH = 0x0003FFFC
 }