mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-23 22:13:47 +00:00
Hardcoded changes for cluster standalone.
This commit is contained in:
Luca Valente
parent
1ddf10447c
commit
b921066dc3
8 changed files with 91 additions and 60 deletions
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@ -59,7 +59,8 @@
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#define ARCHI_SOC_EU_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_SOC_EU_OFFSET )
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#define ARCHI_FC_ITC_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_FC_ITC_OFFSET )
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#define ARCHI_FC_TIMER_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_FC_TIMER_OFFSET )
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#define ARCHI_STDOUT_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_STDOUT_OFFSET )
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//#define ARCHI_STDOUT_ADDR ( ARCHI_SOC_PERIPHERALS_ADDR + ARCHI_STDOUT_OFFSET )
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#define ARCHI_STDOUT_ADDR 0x40000000
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#define ARCHI_FLL_AREA_SIZE 0x00000010
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@ -105,12 +105,12 @@
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* FC
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*/
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#ifndef ARCHI_NO_FC
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#define ARCHI_FC_CID 31
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#define ARCHI_HAS_FC_ITC 1
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#define ARCHI_HAS_FC 1
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#define ARCHI_CORE_HAS_1_10 1
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#endif
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//#ifndef ARCHI_NO_FC
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//#define ARCHI_FC_CID 31
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//#define ARCHI_HAS_FC_ITC 1
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//#define ARCHI_HAS_FC 1
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//#define ARCHI_CORE_HAS_1_10 1
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//#endif
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/*
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@ -108,6 +108,7 @@ void run_benchmark(testcase_t *test, testresult_t *result)
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bench_timer_reset();
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printf("x\n", test);
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test->test(result, bench_timer_start, bench_timer_stop);
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result->time = get_time();
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@ -3,7 +3,7 @@ OUTPUT_ARCH(riscv)
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ENTRY( _start )
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MEMORY
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{
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L2 : ORIGIN = 0x1c000004, LENGTH = 0x0007fffc
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L2 : ORIGIN = 0x1c000000, LENGTH = 0x0007fffc
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L1 : ORIGIN = 0x10000004, LENGTH = 0x0000fffc
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}
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@ -18,18 +18,18 @@
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void pos_soc_init()
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{
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#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
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pos_fll_constructor();
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pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
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pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
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pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
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#else
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//#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
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//
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// pos_fll_constructor();
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//
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// pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
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//
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// pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
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//
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//
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// pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
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//
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//#else
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pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_SOC_FREQUENCY;
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@ -37,6 +37,6 @@ void pos_soc_init()
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pos_freq_domains[PI_FREQ_DOMAIN_CL] = ARCHI_FPGA_CL_FREQUENCY;
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#endif
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//#endif
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}
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@ -17,15 +17,16 @@
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#include "pulp.h"
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#include <stdio.h>
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#include <stdlib.h>
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//#include "init.c"
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volatile void *cluster_entry;
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L1_DATA char *cluster_stacks;
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static volatile int cluster_running;
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static volatile int cluster_retval;
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extern int main(int argc, const char * const argv[]);
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static void pos_wait_forever()
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{
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@ -43,12 +44,22 @@ static void cluster_core_init()
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eu_bar_setup(eu_bar_addr(0), (1<<ARCHI_CLUSTER_NB_PE) - 1);
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}
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// executed by the FC!
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void cluster_entry_stub()
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{
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cluster_core_init();
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synch_barrier();
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if(hal_core_id()==0)
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cluster_start(hal_cluster_id(), main);
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synch_barrier();
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int retval = ((int (*)())cluster_entry)();
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synch_barrier();
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if (hal_core_id() == 0)
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{
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cluster_retval = retval;
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@ -65,7 +76,7 @@ void cluster_start(int cid, int (*entry)())
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cluster_entry = entry;
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// Init FLL
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pos_fll_init(POS_FLL_CL);
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//pos_fll_init(POS_FLL_CL);
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// Initialize cluster L1 memory allocator
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alloc_init_l1(cid);
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@ -73,26 +84,26 @@ void cluster_start(int cid, int (*entry)())
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// Activate icache
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hal_icache_cluster_enable(cid);
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if (!hal_is_fc())
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{
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cluster_core_init();
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}
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// if (!hal_is_fc())
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// {
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// cluster_core_init();
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// }
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alloc_init_l1(cid);
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cluster_stacks = pi_l1_malloc(cid, ARCHI_CLUSTER_NB_PE*CLUSTER_STACK_SIZE);
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if (cluster_stacks == NULL)
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return;
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cluster_running = 1;
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// if (cluster_stacks == NULL)
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// return;
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//
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// cluster_running = 1;
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//
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// Fetch all cores
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for (int i=0; i<ARCHI_CLUSTER_NB_PE; i++)
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{
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plp_ctrl_core_bootaddr_set_remote(cid, i, (int)_start);
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}
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eoc_fetch_enable_remote(cid, (1<<ARCHI_CLUSTER_NB_PE) - 1);
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// for (int i=0; i<ARCHI_CLUSTER_NB_PE; i++)
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// {
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// plp_ctrl_core_bootaddr_set_remote(cid, i, (int)_start);
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// }
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//
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// eoc_fetch_enable_remote(cid, (1<<ARCHI_CLUSTER_NB_PE) - 1);
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}
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@ -27,22 +27,28 @@ pos_init_entry:
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csrr a0, 0xF14
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andi a1, a0, 0x1f
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srli a0, a0, 5
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#ifdef ARCHI_CL_BOOT
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li a2, ARCHI_FC_CID
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beq a0, a2, do_cl_boot
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bnez a1, pe_start
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#else
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#ifdef ARCHI_FC_CID
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li a2, ARCHI_FC_CID
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bne a0, a2, pe_start
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#else
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bnez a1, pe_start
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#endif
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#endif
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li x2, 0x10200000
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li x3, 0x1
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la x4, _start
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sw x4, 0x40(x2)
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sw x3, 8(x2)
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//#ifdef ARCHI_CL_BOOT
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//
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// li a2, ARCHI_FC_CID
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// j do_cl_boot
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//// beq a0, a2, do_cl_boot // FC will go there
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//// bnez a1, pe_start // cluster will go here
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//
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//#else
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//
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//#ifdef ARCHI_FC_CID
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// li a2, ARCHI_FC_CID
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// bne a0, a2, pe_start
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//#else
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// bnez a1, pe_start
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//#endif
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//#endif
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//
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#endif
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@ -159,7 +165,7 @@ pe_start:
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addi a1, a1, 1
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mul x1, x3, a1
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add x2, x2, x1
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j cluster_entry_stub
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j cluster_entry_stub // fc will go here
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#endif
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do_cl_boot:
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@ -168,6 +174,8 @@ do_cl_boot:
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la x4, _start
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sw x4, 0x40(x2)
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sw x3, 8(x2)
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li x2, 0x1a109800
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sw x0, 0(x2)
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loop:
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li x2, 0x1a109800
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@ -58,21 +58,23 @@ void pos_init_start()
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hal_pmu_bypass_set (ARCHI_REG_FIELD_SET (hal_pmu_bypass_get (), 1, 11, 1) );
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#endif
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if(hal_core_id()==0) {
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pos_soc_init();
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pos_irq_init();
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pos_soc_event_init();
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// pos_soc_event_init();
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// Initialize first the memory allocators and the utils so that they are
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// available for constructors, especially to let them declare
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// callbacks
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//__rt_utils_init();
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pos_allocs_init();
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// Call global and static constructors
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// Each module may do private initializations there
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pos_init_do_ctors();
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//pos_init_do_ctors();
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// Now that the system is ready, activate IO
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pos_io_start();
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@ -80,10 +82,18 @@ void pos_init_start()
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// Now now the minimal init are done, we can activate interruptions
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hal_irq_enable();
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if (!hal_is_fc())
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{
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cluster_start(hal_cluster_id(), main);
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}
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cluster_entry_stub();
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//if (!hal_is_fc())
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//{
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// cluster_start(hal_cluster_id(), main);
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//} else
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//{
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// cluster_entry_stub();
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//}
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}
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