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Merge branch 'marsellus' into georgr-questa-2020

Browse source
This commit is contained in:
Georg Rutishauser 2020-04-15 11:55:25 +02:00
commit a80f1bb4a3
37 changed files with 325 additions and 50 deletions
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8
configs/common.sh
View file

@ -1,6 +1,14 @@
#!/bin/bash -e
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
DIRNAME="$(dirname $DIR)"
scriptDir="$(dirname $DIRNAME)"
else
scriptDir="$(dirname "$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")")"
fi
export PULPRT_HOME=$scriptDir
export PULP_SDK_HOME=$PULPRT_HOME

8
configs/fpgas/marsellus/virtex7.sh
View file

@ -1,4 +1,3 @@
#!/bin/bash -e
export PULPRT_TARGET=marsellus
@ -17,7 +16,8 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Virtex7 uses 50MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=50000000'
#Virtex7 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart
export io=uart

5
configs/fpgas/pulp/virtex7.sh
View file

@ -1,4 +1,3 @@
#!/bin/bash -e
export PULPRT_TARGET=pulp
@ -17,7 +16,7 @@ source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Virtex7 uses 50MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=50000000'
#Virtex7 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart

14
configs/fpgas/pulpissimo/genesys2.sh
View file

@ -3,10 +3,20 @@
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
scriptDir="$(dirname "$(dirname "$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")")")"
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
source $scriptDir/common.sh
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Genesys2 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart

22
configs/fpgas/pulpissimo/nexys_video.sh Normal file
View file

@ -0,0 +1,22 @@
#!/bin/bash -e
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Nexys Video uses 5MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=5000000'
export io=uart

22
configs/fpgas/pulpissimo/zcu102.sh Normal file
View file

@ -0,0 +1,22 @@
#!/bin/bash -e
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#ZCU102 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart

22
configs/fpgas/pulpissimo/zcu104.sh Normal file
View file

@ -0,0 +1,22 @@
#!/bin/bash -e
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#ZCU104 uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart

22
configs/fpgas/pulpissimo/zedboard.sh Normal file
View file

@ -0,0 +1,22 @@
#!/bin/bash -e
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/../../common.sh
export PULPRUN_PLATFORM=fpga
#Zedboard uses 10MHz SoC Frequency
export PULPRT_CONFIG_CFLAGS='-DARCHI_FPGA_FREQUENCY=10000000'
export io=uart

9
configs/marsellus.sh
View file

@ -3,6 +3,13 @@
export PULPRT_TARGET=marsellus
export PULPRUN_TARGET=marsellus
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/common.sh

9
configs/pulp.sh
View file

@ -3,6 +3,13 @@
export PULPRT_TARGET=pulp
export PULPRUN_TARGET=pulp
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/common.sh

9
configs/pulpissimo.sh
View file

@ -3,6 +3,13 @@
export PULPRT_TARGET=pulpissimo
export PULPRUN_TARGET=pulpissimo
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
if [ -n "${ZSH_VERSION:-}" ]; then
DIR="$(readlink -f -- "${(%):-%x}")"
scriptDir="$(dirname $DIR)"
else
scriptDir="$(dirname "$(readlink -f "${BASH_SOURCE[0]}")")"
fi
source $scriptDir/common.sh

2
drivers/uart.c
View file

@ -43,7 +43,7 @@ static void uart_wait_rx_done(int periph)
static void uart_setup(int channel, int baudrate)
{
int div = (PERIPH_FREQUENCY + baudrate/2) / baudrate;
int div = (pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] + baudrate/2) / baudrate;
plp_uart_setup(channel - ARCHI_UDMA_UART_ID(0), 0, div-1);
}

12
include/archi/chips/marsellus/properties.h
View file

@ -22,8 +22,17 @@
* FPGA
*/
#define ARCHI_FPGA_FREQUENCY 5000000
#ifndef ARCHI_FPGA_FREQUENCY
#define ARCHI_FPGA_FREQUENCY 1000000
#endif
#ifndef ARCHI_FPGA_FC_FREQUENCY
#define ARCHI_FPGA_FC_FREQUENCY 2000000
#endif
#ifndef ARCHI_FPGA_CL_FREQUENCY
#define ARCHI_FPGA_CL_FREQUENCY 20000000
#endif
/*
* MEMORIES
*/
@ -98,6 +107,7 @@
#define ARCHI_FC_CID 31
#define ARCHI_HAS_FC_ITC 1
#define ARCHI_HAS_FC 1
#define ARCHI_CORE_HAS_1_10 1
/*

11
include/archi/chips/pulp/properties.h
View file

@ -22,7 +22,17 @@
* FPGA
*/
#ifndef ARCHI_FPGA_FREQUENCY
#define ARCHI_FPGA_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_FC_FREQUENCY
#define ARCHI_FPGA_FC_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_CL_FREQUENCY
#define ARCHI_FPGA_CL_FREQUENCY 5000000
#endif
/*
* MEMORIES
@ -99,6 +109,7 @@
#define ARCHI_FC_CID 31
#define ARCHI_HAS_FC_ITC 1
#define ARCHI_HAS_FC 1
#define ARCHI_CORE_HAS_1_10 1
#endif

5
include/archi/chips/pulpissimo/properties.h
View file

@ -26,6 +26,10 @@
#define ARCHI_FPGA_FREQUENCY 5000000
#endif
#ifndef ARCHI_FPGA_FC_FREQUENCY
#define ARCHI_FPGA_FC_FREQUENCY 5000000
#endif
/*
* MEMORIES
@ -78,6 +82,7 @@
#define ARCHI_FC_CID 31
#define ARCHI_HAS_FC_ITC 1
#define ARCHI_HAS_FC 1
#define ARCHI_CORE_HAS_1_10 1

2
include/chips/marsellus/config.h
View file

@ -25,6 +25,4 @@
#define PULP_CHIP_STR marsellus
#define PULP_CHIP_FAMILY_STR marsellus
#define PERIPH_FREQUENCY 50000000
#endif

2
include/chips/marsellus/soc.h
View file

@ -22,7 +22,7 @@
#define POS_FLL_PERIPH 1
#define POS_FLL_FC 0
extern int pos_freq_domains[ARCHI_NB_FLL];
extern int pos_freq_domains[PI_FREQ_NB_DOMAINS];
void pos_soc_init();

2
include/chips/pulp/config.h
View file

@ -25,6 +25,4 @@
#define PULP_CHIP_STR pulp
#define PULP_CHIP_FAMILY_STR pulp
#define PERIPH_FREQUENCY 50000000
#endif

2
include/chips/pulp/soc.h
View file

@ -22,7 +22,7 @@
#define POS_FLL_PERIPH 1
#define POS_FLL_FC 0
extern int pos_freq_domains[ARCHI_NB_FLL];
extern int pos_freq_domains[PI_FREQ_NB_DOMAINS];
void pos_soc_init();

6
include/chips/pulpissimo/config.h
View file

@ -25,10 +25,4 @@
#define PULP_CHIP_STR pulpissimo
#define PULP_CHIP_FAMILY_STR pulpissimo
#if __PLATFORM__ == ARCHI_PLATFORM_FPGA
#define PERIPH_FREQUENCY 5000000
#else
#define PERIPH_FREQUENCY 50000000
#endif
#endif

2
include/chips/pulpissimo/soc.h
View file

@ -22,7 +22,7 @@
#define POS_FLL_PERIPH 1
#define POS_FLL_FC 0
extern int pos_freq_domains[ARCHI_NB_FLL];
extern int pos_freq_domains[PI_FREQ_NB_DOMAINS];
void pos_soc_init();

8
include/hal/timer/timer_v2.h
View file

@ -42,6 +42,14 @@ static inline unsigned int timer_base_cl(int cid, int id, int sub_id)
return ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(0) + ARCHI_TIMER_OFFSET + id * ARCHI_TIMER_SIZE + sub_id * 4;
}
#else
static inline unsigned int timer_base_cl(int cid, int id, int sub_id)
{
return 0;
}
#endif

22
include/implem/irq.h
View file

@ -23,11 +23,11 @@
void pos_irq_init();
void pos_irq_set_handler(int irq, void (*handler)());
void rt_irq_set_handler(int irq, void (*handler)());
static inline void pos_irq_mask_set(unsigned int mask)
static inline void rt_irq_mask_set(unsigned int mask)
{
#if defined(__RISCV_GENERIC__)
// Generic riscv case, e.g. Ibex
@ -58,7 +58,7 @@ static inline void pos_irq_mask_set(unsigned int mask)
static inline void pos_irq_mask_clr(unsigned int mask)
static inline void rt_irq_mask_clr(unsigned int mask)
{
#if defined(__RISCV_GENERIC__)
hal_spr_read_then_clr_from_reg(0x304, mask);
@ -82,7 +82,7 @@ static inline void pos_irq_mask_clr(unsigned int mask)
static inline void pos_irq_clr(unsigned int mask)
static inline void rt_irq_clr(unsigned int mask)
{
#if defined(__RISCV_GENERIC__)
// TODO
@ -101,7 +101,7 @@ static inline void pos_irq_clr(unsigned int mask)
#endif
}
static inline unsigned int pos_irq_get_fc_vector_base()
static inline unsigned int rt_irq_get_fc_vector_base()
{
if (hal_is_fc())
{
@ -118,7 +118,9 @@ static inline unsigned int pos_irq_get_fc_vector_base()
else
{
#if defined(ARCHI_HAS_CLUSTER)
#if defined(ARCHI_CLUSTER_CTRL_ADDR)
#if defined(ARCHI_CORE_HAS_1_10)
return __builtin_pulp_spr_read(SR_MTVEC) & ~1;
#elif defined(ARCHI_CLUSTER_CTRL_ADDR)
return plp_ctrl_bootaddr_get();
#endif
#endif
@ -129,7 +131,7 @@ static inline unsigned int pos_irq_get_fc_vector_base()
static inline void pos_irq_set_fc_vector_base(unsigned int base)
static inline void rt_irq_set_fc_vector_base(unsigned int base)
{
if (hal_is_fc())
{
@ -146,7 +148,9 @@ static inline void pos_irq_set_fc_vector_base(unsigned int base)
else
{
#if defined(ARCHI_HAS_CLUSTER)
#if defined(ARCHI_CLUSTER_CTRL_ADDR)
#if defined(ARCHI_CORE_HAS_1_10)
__builtin_pulp_spr_write(SR_MTVEC, base | 1);
#elif defined(ARCHI_CLUSTER_CTRL_ADDR)
plp_ctrl_bootaddr_set(base);
#endif
#endif
@ -154,7 +158,7 @@ static inline void pos_irq_set_fc_vector_base(unsigned int base)
}
static inline void pos_irq_wait_for_interrupt()
static inline void rt_irq_wait_for_interrupt()
{
#if !defined(ARCHI_HAS_FC) || defined(ARCHI_HAS_FC_EU)
eu_evt_wait();

26
include/pulp.h
View file

@ -31,15 +31,31 @@
typedef enum {
PI_FREQ_DOMAIN_FC = 0,
PI_FREQ_DOMAIN_CL = 1,
PI_FREQ_DOMAIN_PERIPH = 2
PI_FREQ_DOMAIN_PERIPH = 2,
PI_FREQ_NB_DOMAINS = 3
} pi_freq_domain_e;
#ifdef ARCHI_HAS_CLUSTER
void cluster_start(int cid, int (*entry)());
void cluster_entry_stub();
int cluster_wait(int cid);
#else
static inline void cluster_start(int cid, int (*entry)())
{
}
static inline int cluster_wait(int cid)
{
return 0;
}
#endif
void _start();
#include <implem/implem.h>
@ -62,6 +78,14 @@ int uart_read(int uart_id, void *buffer, uint32_t size);
void synch_barrier();
void *pi_l1_malloc(int cid, int size);
void pi_l1_free(int cid, void *chunk, int size);
void *pi_l2_malloc(int size);
void pi_l2_free(void *_chunk, int size);
#endif

11
kernel/alloc_pool.c
View file

@ -90,6 +90,17 @@ void alloc_init_l1(int cid)
{
pos_alloc_init(&pos_alloc_l1[cid], pos_l1_base(cid), pos_l1_size(cid));
}
void *pi_l1_malloc(int cid, int size)
{
return pos_alloc(&pos_alloc_l1[cid], size);
}
void pi_l1_free(int cid, void *chunk, int size)
{
return pos_free(&pos_alloc_l1[cid], chunk, size);
}
#endif

13
kernel/chips/marsellus/soc.c
View file

@ -18,12 +18,25 @@
void pos_soc_init()
{
#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
pos_fll_constructor();
pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
#else
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_FC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_CL] = ARCHI_FPGA_CL_FREQUENCY;
#endif
}

12
kernel/chips/pulp/soc.c
View file

@ -18,6 +18,8 @@
void pos_soc_init()
{
#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
pos_fll_constructor();
pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
@ -26,5 +28,15 @@ void pos_soc_init()
pos_freq_domains[PI_FREQ_DOMAIN_CL] = pos_fll_init(POS_FLL_CL);
#else
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_FC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_CL] = ARCHI_FPGA_CL_FREQUENCY;
#endif
}

10
kernel/chips/pulpissimo/soc.c
View file

@ -18,10 +18,20 @@
void pos_soc_init()
{
#if __PLATFORM__ != ARCHI_PLATFORM_FPGA
pos_fll_constructor();
pos_freq_domains[PI_FREQ_DOMAIN_FC] = pos_fll_init(POS_FLL_FC);
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = pos_fll_init(POS_FLL_PERIPH);
#else
pos_freq_domains[PI_FREQ_DOMAIN_FC] = ARCHI_FPGA_FC_FREQUENCY;
pos_freq_domains[PI_FREQ_DOMAIN_PERIPH] = ARCHI_FPGA_FREQUENCY;
#endif
}

8
kernel/cluster.c
View file

@ -20,7 +20,7 @@
volatile void *cluster_entry;
L1_DATA char cluster_stacks[ARCHI_CLUSTER_NB_PE*CLUSTER_STACK_SIZE];
L1_DATA char *cluster_stacks;
static volatile int cluster_running;
@ -78,6 +78,12 @@ void cluster_start(int cid, int (*entry)())
cluster_core_init();
}
alloc_init_l1(cid);
cluster_stacks = pi_l1_malloc(cid, ARCHI_CLUSTER_NB_PE*CLUSTER_STACK_SIZE);
if (cluster_stacks == NULL)
return;
cluster_running = 1;
// Fetch all cores

30
kernel/crt0.S
View file

@ -33,6 +33,14 @@ pos_init_entry:
csrr a0, 0xF14
andi a1, a0, 0x1f
srli a0, a0, 5
#ifdef ARCHI_CL_BOOT
li a2, ARCHI_FC_CID
beq a0, a2, do_cl_boot
bnez a1, pe_start
#else
#ifdef ARCHI_FC_CID
li a2, ARCHI_FC_CID
bne a0, a2, pe_start
@ -41,6 +49,8 @@ pos_init_entry:
#endif
#endif
#endif
# Clear the bss segment
@ -89,7 +99,7 @@ pos_init_entry:
#ifdef ARCHI_CORE_HAS_1_10
j pos_illegal_instr
j __rt_handle_illegal_instr
#else
j pos_no_irq_handler
#endif
@ -134,7 +144,7 @@ _start:
pos_illegal_instr:
j pos_irq_illegal_instr
j __rt_handle_illegal_instr
pos_no_irq_handler:
mret
@ -150,9 +160,23 @@ pos_semihosting_call:
#if defined(ARCHI_HAS_CLUSTER)
pe_start:
la x2, cluster_stacks
lw x2, 0(x2)
li x3, CLUSTER_STACK_SIZE
addi a1, a1, 1
mul x1, x3, a1
add x2, x2, x1
j cluster_entry_stub
#endif
#endif
do_cl_boot:
li x2, 0x10200000
li x3, 0x1
la x4, _start
sw x4, 0x40(x2)
sw x3, 8(x2)
loop:
li x2, 0x1a109800
sw x0, 0(x2)
wfi
j loop

6
kernel/fll-v1.c
View file

@ -98,9 +98,9 @@ void pos_freq_wait_convergence(int fll)
if ( mult_factor_diff <= tolerance)
break;
pos_irq_mask_set(1<<ARCHI_FC_EVT_CLK_REF);
pos_irq_wait_for_interrupt();
pos_irq_mask_clr(1<<ARCHI_FC_EVT_CLK_REF);
rt_irq_mask_set(1<<ARCHI_FC_EVT_CLK_REF);
rt_irq_wait_for_interrupt();
rt_irq_mask_clr(1<<ARCHI_FC_EVT_CLK_REF);
} while (1);
hal_irq_restore(irq);

2
kernel/freq-domains.c
View file

@ -18,7 +18,7 @@
#include <pulp.h>
int pos_freq_domains[ARCHI_NB_FLL];
int pos_freq_domains[PI_FREQ_NB_DOMAINS];

11
kernel/irq.c
View file

@ -43,7 +43,7 @@ static unsigned int pos_irq_get_itvec(unsigned int ItBaseAddr, unsigned int ItIn
void pos_irq_set_handler(int irq, void (*handler)())
void rt_irq_set_handler(int irq, void (*handler)())
{
#if defined(__RISCV_GENERIC__)
if (irq < 16)
@ -52,7 +52,7 @@ void pos_irq_set_handler(int irq, void (*handler)())
irq -= 16;
#endif
unsigned int base = pos_irq_get_fc_vector_base();
unsigned int base = rt_irq_get_fc_vector_base();
unsigned int jmpAddr = base + 0x4 * irq;
@ -70,7 +70,7 @@ void pos_irq_set_handler(int irq, void (*handler)())
void pos_irq_illegal_instr()
void __rt_handle_illegal_instr()
{
//unsigned int mepc = hal_mepc_read();
//rt_warning("Reached illegal instruction (PC: 0x%x, opcode: 0x%x\n", mepc, *(int *)mepc);
@ -83,9 +83,10 @@ void pos_irq_init()
{
// We may enter the runtime with some interrupts active for example
// if we force the boot to jump to the runtime through jtag.
pos_irq_mask_clr(-1);
rt_irq_mask_clr(-1);
// As the FC code may not be at the beginning of the L2, set the
// vector base to get proper interrupt handlers
pos_irq_set_fc_vector_base(pos_irq_vector_base());
rt_irq_set_fc_vector_base(pos_irq_vector_base());
}

5
rules/pulpos/default_rules.mk
View file

@ -39,6 +39,7 @@ VPATH = $(PULPRT_HOME)
include $(PULPRT_HOME)/rules/pulpos/src.mk
PULP_CFLAGS += $(PULPRT_CONFIG_CFLAGS)
PULP_CFLAGS += -fno-jump-tables -fno-tree-loop-distribute-patterns
ifeq '$(CONFIG_LIBC_MINIMAL)' '1'
@ -76,6 +77,10 @@ ifdef CONFIG_NO_FC
PULP_CFLAGS += -DARCHI_NO_FC=1
endif
ifdef CONFIG_CL_BOOT
PULP_CFLAGS += -DARCHI_CL_BOOT=1
endif
ifdef CONFIG_IO_UART
PULP_CFLAGS += -DCONFIG_IO_UART=$(CONFIG_IO_UART)
endif

5
rules/pulpos/targets/marsellus.mk
View file

@ -41,4 +41,9 @@ PULP_SRCS += kernel/chips/marsellus/soc.c
include $(PULPRT_HOME)/rules/pulpos/configs/default.mk
ifeq '$(platform)' 'fpga'
CONFIG_IO_UART=1
endif
include $(PULPRT_HOME)/rules/pulpos/default_rules.mk

5
rules/pulpos/targets/pulp.mk
View file

@ -41,4 +41,9 @@ PULP_SRCS += kernel/chips/pulp/soc.c
include $(PULPRT_HOME)/rules/pulpos/configs/default.mk
ifeq '$(platform)' 'fpga'
CONFIG_IO_UART=1
endif
include $(PULPRT_HOME)/rules/pulpos/default_rules.mk

5
rules/pulpos/targets/pulpissimo.mk
View file

@ -40,4 +40,9 @@ PULP_SRCS += kernel/chips/pulpissimo/soc.c
include $(PULPRT_HOME)/rules/pulpos/configs/default.mk
ifeq '$(platform)' 'fpga'
CONFIG_IO_UART=1
endif
include $(PULPRT_HOME)/rules/pulpos/default_rules.mk