mirror of
https://github.com/saymrwulf/pulp-runtime.git
synced 2026-05-27 22:46:05 +00:00
Target LLVM instead of GCC
Only for CV32E40X, at least for now. This commit also adds a script
objdump2itb.py from core-v-verif:
4e6e8604fa/bin/objdump2itb
This is used to generate an instruction table file that is, in turn,
used to populate instruction traces.
The script is lightly patched to support llvm-objdump's output.
This commit is contained in:
Francesco Conti
parent
fcca7032d4
commit
7b50643266
3 changed files with 203 additions and 10 deletions
186
bin/objdump2itb.py
Executable file
186
bin/objdump2itb.py
Executable file
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@ -0,0 +1,186 @@
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#!/usr/bin/env python3
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################################################################################
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#
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# Copyright 2021 OpenHW Group
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# Copyright 2021 Silicon Labs
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#
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# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# https://solderpad.org/licenses/
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier:Apache-2.0 WITH SHL-2.0
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#
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################################################################################
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#
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# dump2itb: python script to parse a GNU binutils objdump output file
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# into an instruction table format, which is a custom
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# text file more suitable for parsing using the standard IEEE 1800
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# text parsing functions
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#
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# The objdump should set the following flags to ensure that the regexps will
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# parse the expected text properly
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# % objdump -d -l -s program.elf > program.objdump
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#
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# The instruction table file format for a single instruction is:
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#
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# #<num_of_src_lines>
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# #<stc_line_0>
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# #<stc_line_1>
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# #...
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# #<src_line_n>
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# <instr_addr> <instr_func> <basename of instr_src> <line_num> <opcode> <num of asm words> <asm_word_0> <asm_word_1> <...> <asm_word_n>
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#
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# An esample: Note that the pound signs are part of the format
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# #6
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# # // Expect DCSR
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# # // 31:28 XDEBUGER Version = 4
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# # // 8:6 Cause = 2 Trigger
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# # // 1:0 Privelege = 3 Machine
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# # // TBD FIXME BUG documentation update needed
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# # li t1, 4<<28 | 2<<6 | 3<<0 | 1<<15
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# 437324064 _debugger_trigger_match_ebreak debugger.S 171 40008337 2 lui x6,0x40008
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#
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#
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# Author: Steve Richmond
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# email: steve.richmond@silabs.com
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#
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# Written with Python 3.5.1 on RHEL 7.7. Your python mileage may vary.
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#
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################################################################################
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import string
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import sys
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import re
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import argparse
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import logging
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logging.basicConfig(level=logging.INFO)
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logger = logging.getLogger(__name__)
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class CFunction:
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def __init__(self, addr, name):
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self.addr = addr
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self.name = name
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# Regular expression to extract a function from objdump
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# Example:
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# 00000256 <end_handler_incr_mepc>:
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FUNC_PATTERN = "(?P<addr>[0-9a-f]{8}) <(?P<name>\S*)>:"
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FUNC_RE = re.compile(FUNC_PATTERN)
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# Regular expression to extract an individual instruction
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# Example:
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# 264: 00a31363 bne t1,a0,26a <end_handler_incr_mepc2>
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INST_PATTERN = "(?P<addr>[0-9a-f]{1,8}):[\t\s]*(?P<mcode>[0-9a-f]{2}\s*[0-9a-f]{2}\s*([0-9a-f]{2}\s*[0-9a-f]{2})?)\s{2,}(?P<asm>[a-z].*)$"
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INST_RE = re.compile(INST_PATTERN)
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# Regular expression to extract a source annotation for each instruction
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# Example:
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# /work/strichmo/core-v-verif/cv32e40x/tests/programs/custom/debug_test_trigger/debugger.S:47
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SRC_FILE_PATTERN = "^(?P<dir>/\S+)/(?P<file>[^/\s]+):(?P<line>[0-9]*)$"
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SRC_FILE_RE = re.compile(SRC_FILE_PATTERN)
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parser = argparse.ArgumentParser(formatter_class=argparse.ArgumentDefaultsHelpFormatter)
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parser.add_argument('objdump', help='Required objdump file for parsing. Use - to read STDIN')
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parser.add_argument('--debug', action='store_true', help='Enable more debug messages')
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# Main function
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def objdump2itb():
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'''Parse an objdump file'''
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args = parser.parse_args(sys.argv[1:])
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if args.debug:
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logger.setLevel(logging.DEBUG)
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parse(args.objdump)
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def parse(objdump):
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'''Parse the file'''
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if objdump == '-':
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fp = sys.stdin
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else:
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fp = open(objdump)
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current_cfunction = None
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current_src_file = None
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current_src_line = 0
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current_src_code = ""
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used_src = 0
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for line in fp:
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line_orig = line.strip('\n')
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line = line.strip()
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if not line:
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continue
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# Parse function
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func = FUNC_RE.match(line)
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if func:
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d = func.groupdict()
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current_cfunction = CFunction(d["addr"], d["name"])
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current_src_code = "" # reset the source code lines
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used_src = 0
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continue
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# Parse source file
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src_file = SRC_FILE_RE.match(line)
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if src_file:
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d = src_file.groupdict()
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current_src_file = d["file"]
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current_src_line = d["line"]
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current_src_code = "" # reset the source code lines
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used_src = 0
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continue
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# Parse instruction
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inst = INST_RE.match(line)
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if inst:
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d = inst.groupdict()
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addr = d["addr"]
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mcode = d["mcode"]
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asm = d["asm"]
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mcode = mcode.replace(" ", "")
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asm = asm.replace("\t", " ").strip()
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addr = int("0x{}".format(addr), 0)
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fname = current_cfunction.name
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asm_len = len(asm.split())
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used_src = 1
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if current_src_code == "":
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src_len = 0
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print("#{}".format(src_len))
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else:
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src_len = len(current_src_code.split('\n'));
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print("#{}\n{}".format(src_len, current_src_code))
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print("{} {} {} {} {} {} {}".format(addr, fname, current_src_file, current_src_line, mcode, asm_len, asm))
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logger.debug("Addr: '{:x}' Func: '{}' Source File: '{}' Source lineno: '{}' mcode: '{}' Asm: '{}'".format(
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int(addr), fname, current_src_file, current_src_line, mcode, asm))
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continue
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# no match on filters
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if current_src_code:
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src_len = len(current_src_code.split('\n'));
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if (src_len < 10): # keep src from getting too long, also good if filenames are missing
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current_src_code += "\n#" + line_orig
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else:
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if current_src_file: # don't start adding source before first src file
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# first src line no newline before
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current_src_code = "#" + line_orig
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logger.debug("Unmatched (treating as source line): '{}'".format(line))
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if __name__ == '__main__':
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objdump2itb()
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@ -15,10 +15,12 @@ VSIM ?= vsim
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ifdef PULP_RUNTIME_GCC_TOOLCHAIN
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PULP_CC := $(PULP_RUNTIME_GCC_TOOLCHAIN)/bin/$(PULP_CC)
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PULP_LD := $(PULP_RUNTIME_GCC_TOOLCHAIN)/bin/$(PULP_LD)
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PULP_OBJDUMP := $(PULP_RUNTIME_GCC_TOOLCHAIN)/bin/$(PULP_OBJDUMP)
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else
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ifdef PULP_RISCV_GCC_TOOLCHAIN
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PULP_CC := $(PULP_RISCV_GCC_TOOLCHAIN)/bin/$(PULP_CC)
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PULP_LD := $(PULP_RISCV_GCC_TOOLCHAIN)/bin/$(PULP_LD)
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PULP_OBJDUMP := $(PULP_RISCV_GCC_TOOLCHAIN)/bin/$(PULP_OBJDUMP)
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else
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$(warning "Warning: Neither PULP_RUNTIME_GCC_TOOLCHAIN nor PULP_RISCV_GCC_TOOLCHAIN is set.\
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Using defaults.")
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@ -41,7 +43,7 @@ VPATH = $(PULPRT_HOME)
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include $(PULPRT_HOME)/rules/pulpos/src.mk
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PULP_CFLAGS += $(PULPRT_CONFIG_CFLAGS)
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PULP_CFLAGS += -fno-jump-tables -fno-tree-loop-distribute-patterns
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PULP_CFLAGS += -fno-jump-tables
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ifeq '$(CONFIG_LIBC_MINIMAL)' '1'
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PULP_APP_CFLAGS += -I$(PULPRT_HOME)/lib/libc/minimal/include
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@ -167,6 +169,7 @@ else
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# default bootmode
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vsim_flags += +bootmode=jtag
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endif
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vsim_flags += +log_file=trace_core.log +itb_file=$(TARGETS).itb
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else
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@ -312,8 +315,12 @@ $(TARGET_BUILD_DIR)/stdout:
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$(TARGET_BUILD_DIR)/fs:
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mkdir -p $@
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# ITB file needed by CV32E40X tracer
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$(TARGETS).itb:
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$(PULP_OBJDUMP) -d -l -s $(disopt) $(TARGETS) > $(TARGETS).dis
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$(PULPRT_HOME)/bin/objdump2itb.py $(TARGETS).dis > $(TARGETS).itb
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run: $(TARGET_BUILD_DIR)/modelsim.ini $(TARGET_BUILD_DIR)/work $(TARGET_BUILD_DIR)/boot $(TARGET_BUILD_DIR)/tcl_files $(TARGET_BUILD_DIR)/stdout $(TARGET_BUILD_DIR)/fs $(TARGET_BUILD_DIR)/waves
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run: $(TARGET_BUILD_DIR)/modelsim.ini $(TARGET_BUILD_DIR)/work $(TARGET_BUILD_DIR)/boot $(TARGET_BUILD_DIR)/tcl_files $(TARGET_BUILD_DIR)/stdout $(TARGET_BUILD_DIR)/fs $(TARGET_BUILD_DIR)/waves $(TARGETS).itb
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$(PULPRT_HOME)/bin/stim_utils.py --binary=$(TARGETS) --vectors=$(TARGET_BUILD_DIR)/vectors/stim.txt
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$(PULPRT_HOME)/bin/plp_mkflash --flash-boot-binary=$(TARGETS) --stimuli=$(TARGET_BUILD_DIR)/vectors/qspi_stim.slm --flash-type=spi --qpi
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$(PULPRT_HOME)/bin/slm_hyper.py --input=$(TARGET_BUILD_DIR)/vectors/qspi_stim.slm --output=$(TARGET_BUILD_DIR)/vectors/hyper_stim.slm
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@ -18,9 +18,9 @@ PULP_ARCH_OBJDFLAGS ?=
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else ifdef USE_CV32E40X
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PULP_LDFLAGS +=
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PULP_CFLAGS += -D__riscv__ -UARCHI_CORE_HAS_PULPV2 -DRV_ISA_RV32
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PULP_ARCH_CFLAGS ?= -march=rv32imc -mnohwloop
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PULP_ARCH_LDFLAGS ?= -march=rv32imc -mnohwloop
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PULP_ARCH_OBJDFLAGS ?= -Mmarch=rv32imc -mnohwloop
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PULP_ARCH_CFLAGS ?= -march=rv32imc --target=riscv32
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PULP_ARCH_LDFLAGS ?= -march=rv32imc --target=riscv32
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PULP_ARCH_OBJDFLAGS ?= -D
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else
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PULP_LDFLAGS +=
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PULP_CFLAGS += -D__riscv__
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@ -31,12 +31,12 @@ endif
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PULP_CFLAGS += -fdata-sections -ffunction-sections -include chips/pulpissimo/config.h -I$(PULPRT_HOME)/include/chips/pulpissimo
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PULP_OMP_CFLAGS += -fopenmp -mnativeomp
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PULP_LDFLAGS += -nostartfiles -nostdlib -Wl,--gc-sections -L$(PULPRT_HOME)/kernel -Tchips/pulpissimo/link.ld -lgcc
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PULP_LDFLAGS += -nostartfiles -nostdlib -Wl,--gc-sections -L$(PULPRT_HOME)/kernel -Tchips/pulpissimo/link.ld
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PULP_CC = riscv32-unknown-elf-gcc
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PULP_AR ?= riscv32-unknown-elf-ar
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PULP_LD ?= riscv32-unknown-elf-gcc
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PULP_OBJDUMP ?= riscv32-unknown-elf-objdump
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PULP_CC = clang
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PULP_AR ?= llvm-ar
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PULP_LD ?= clang
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PULP_OBJDUMP ?= llvm-objdump
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fc/archi=riscv
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pe/archi=riscv
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