diff --git a/include/archi/hmr/hmr_v1.h b/include/archi/hmr/hmr_v1.h
index 7374489..92ed91b 100644
--- a/include/archi/hmr/hmr_v1.h
+++ b/include/archi/hmr/hmr_v1.h
@@ -50,6 +50,7 @@ extern "C" {
 #define HMR_REGISTERS_AVAIL_CONFIG_INDEPENDENT_BIT 0
 #define HMR_REGISTERS_AVAIL_CONFIG_DUAL_BIT 1
 #define HMR_REGISTERS_AVAIL_CONFIG_TRIPLE_BIT 2
+#define HMR_REGISTERS_AVAIL_CONFIG_RAPID_RECOVERY_BIT 8
 
 // Enabled cores, based on the configuration. Can be used for barriers.
 #define HMR_REGISTERS_CORES_EN_REG_OFFSET 0x4
@@ -72,12 +73,18 @@ extern "C" {
 #define HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_FIELD \
   ((bitfield_field32_t) { .mask = HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_MASK, .index = HMR_REGISTERS_TMR_ENABLE_TMR_ENABLE_OFFSET })
 
+// DMR configuration bits.
+#define HMR_REGISTERS_DMR_CONFIG_REG_OFFSET 0x10
+#define HMR_REGISTERS_DMR_CONFIG_RAPID_RECOVERY_BIT 0
+#define HMR_REGISTERS_DMR_CONFIG_FORCE_RECOVERY_BIT 1
+
 // TMR configuration bits.
-#define HMR_REGISTERS_TMR_CONFIG_REG_OFFSET 0x10
+#define HMR_REGISTERS_TMR_CONFIG_REG_OFFSET 0x14
 #define HMR_REGISTERS_TMR_CONFIG_DELAY_RESYNCH_BIT 0
 #define HMR_REGISTERS_TMR_CONFIG_SETBACK_BIT 1
 #define HMR_REGISTERS_TMR_CONFIG_RELOAD_SETBACK_BIT 2
-#define HMR_REGISTERS_TMR_CONFIG_FORCE_RESYNCH_BIT 3
+#define HMR_REGISTERS_TMR_CONFIG_RAPID_RECOVERY_BIT 3
+#define HMR_REGISTERS_TMR_CONFIG_FORCE_RESYNCH_BIT 4
 
 #ifdef __cplusplus
 }  // extern "C"
@@ -128,7 +135,8 @@ extern "C" {
 
 // DMR configuration bits.
 #define HMR_DMR_REGS_DMR_CONFIG_REG_OFFSET 0x4
-#define HMR_DMR_REGS_DMR_CONFIG_TODO_BIT 0
+#define HMR_DMR_REGS_DMR_CONFIG_RAPID_RECOVERY_BIT 0
+#define HMR_DMR_REGS_DMR_CONFIG_FORCE_RECOVERY_BIT 1
 
 // Address for the last checkpoint.
 #define HMR_DMR_REGS_CHECKPOINT_ADDR_REG_OFFSET 0x8
@@ -159,7 +167,8 @@ extern "C" {
 #define HMR_TMR_REGS_TMR_CONFIG_DELAY_RESYNCH_BIT 0
 #define HMR_TMR_REGS_TMR_CONFIG_SETBACK_BIT 1
 #define HMR_TMR_REGS_TMR_CONFIG_RELOAD_SETBACK_BIT 2
-#define HMR_TMR_REGS_TMR_CONFIG_FORCE_RESYNCH_BIT 3
+#define HMR_TMR_REGS_TMR_CONFIG_RAPID_RECOVERY_BIT 3
+#define HMR_TMR_REGS_TMR_CONFIG_FORCE_RESYNCH_BIT 4
 
 // Stack Pointer storage register
 #define HMR_TMR_REGS_SP_STORE_REG_OFFSET 0x8