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https://github.com/saymrwulf/pulp-runtime.git
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[wip] 3D transfer functions
This commit is contained in:
Daniel Keller
parent
c8fdbf6462
commit
62febf1127
1 changed files with 261 additions and 5 deletions
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@ -54,16 +54,16 @@ typedef unsigned int dma_ext_t;
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#define IDMA_DEFAULT_CONFIG_L1TOL1_2D (IDMA_DEFAULT_CONFIG_2D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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#define IDMA_DEFAULT_CONFIG_L1TOL1_2D (IDMA_DEFAULT_CONFIG_2D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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// TODO add 3D support
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// TODO add 3D support
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// #define IDMA_DEFAULT_CONFIG_3D 0x800 // 0x1 << 11 = 0x800
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#define IDMA_DEFAULT_CONFIG_3D 0x800 // 0x1 << 11 = 0x800
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// #define IDMA_DEFAULT_CONFIG_L1TOL2_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_AXI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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#define IDMA_DEFAULT_CONFIG_L1TOL2_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_AXI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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// #define IDMA_DEFAULT_CONFIG_L2TOL1_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_AXI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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#define IDMA_DEFAULT_CONFIG_L2TOL1_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_AXI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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// #define IDMA_DEFAULT_CONFIG_L1TOL1_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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#define IDMA_DEFAULT_CONFIG_L1TOL1_3D (IDMA_DEFAULT_CONFIG_3D | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET) | (IDMA_PROT_OBI << IDMA_REG32_3D_CONF_DST_PROTOCOL_OFFSET))
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/** @name High-level DMA memory copy functions; compatible with MCHAN driver interface
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/** @name High-level DMA memory copy functions; compatible with MCHAN driver interface
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* The following functions can be used to trigger DMA transfers to copy data between the cluster memory (L1) and another memory outside the cluster (another cluster L1 or L2).
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* The following functions can be used to trigger DMA transfers to copy data between the cluster memory (L1) and another memory outside the cluster (another cluster L1 or L2).
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* The DMA supports the following features:
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* The DMA supports the following features:
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* - Transfers are event-based. With event-based transfers the core can call a wait function to block execution until the transfer is done.
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* - Transfers are event-based. With event-based transfers the core can call a wait function to block execution until the transfer is done.
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* - The DMA supports 2D transfers which allows transfering a 2D tile in one command. Additional information must then be given to specify the width of the tile and the number of bytes between 2 lines of the tile.
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* - The DMA supports 2D and 3D transfers which allows transfering a 2D tile in one command. Additional information must then be given to specify the width of the tile and the number of bytes between 2 lines of the tile.
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* - The event sent at the end of the transfer is broadcasted to all cluster cores.
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* - The event sent at the end of the transfer is broadcasted to all cluster cores.
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* - To identify specific transfers, the DMA provides a transfer identifier.
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* - To identify specific transfers, the DMA provides a transfer identifier.
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* - Multiple transfers can be launched simultaneously, with them being executed 2-4 in parallel, with more waiting in a queue.
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* - Multiple transfers can be launched simultaneously, with them being executed 2-4 in parallel, with more waiting in a queue.
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@ -253,6 +253,89 @@ static inline struct dma_id pulp_cl_idma_L2ToL1_2d(unsigned int src, unsigned in
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static inline struct dma_id pulp_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_cl_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_cl_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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/** 3-dimensional memory transfer with event-based completion.
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*
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\param src Address from where to access the data. There is no restriction on memory alignment.
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\param dst Address where to write the data. There is no restriction on memory alignment.
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\param size Number of bytes per 1D transfer to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param src_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536. Set equal to size to obtain an 1D transfer from the source region.
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\param dst_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536. Set equal to size to obtain an 1D transfer to the destination memory.
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\param num_reps Number of 1D transfers that comprise the 2D transfer.
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\param src_prot choose IDMA_PROT_AXI for transfer from L2, IDMA_PROT_OBI for transfer from L1 and IDMA_PROT_INIT for a transfer
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of all-0 data
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\param dst_prot choose IDMA_PROT_AXI for transfer to L2, IDMA_PROT_OBI for transfer to L1 and IDMA_PROT_INIT for a transfer
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to /dev/null (i.e. the stream will be "eaten"). Note that AXI-to-AXI transfers are not supported.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer.
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*/
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static inline struct dma_id pulp_idma_memcpy_3d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot);
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static inline struct dma_id pulp_cl_idma_memcpy_3d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot);
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/** Intra-cluster memory 3-dimensional transfer with event-based completion.
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*
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\param src Address in the cluster memory where to store the data. There is no restriction on memory alignment.
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\param dst Address in the cluster memory where to load the data. There is no restriction on memory alignment.
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\param size Number of bytes to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param src_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param dst_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param num_reps Number of 1D transfers that comprise the 2D transfer.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer.
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*/
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static inline struct dma_id pulp_idma_L1ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_cl_idma_L1ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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/** Cluster memory to external memory 3-dimensional transfer with event-based completion.
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*
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\param src Address in the external memory where to store the data. There is no restriction on memory alignment.
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\param dst Address in the cluster memory where to load the data. There is no restriction on memory alignment.
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\param size Number of bytes to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param src_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param dst_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param num_reps Number of 1D transfers that comprise the 2D transfer.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer.
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*/
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static inline struct dma_id pulp_idma_L1ToL2_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_cl_idma_L1ToL2_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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/** Cluster memory to external memory 3-dimensional transfer with event-based completion.
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*
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\param ext Address in the external memory where to store the data. There is no restriction on memory alignment.
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\param loc Address in the cluster memory where to load the data. There is no restriction on memory alignment.
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\param size Number of bytes to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536. This applies only to the external memory.
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\param length 2D length, which is the number of transfered bytes after which the DMA will switch to the next line. Must fit 16 bits, i.e. must be inferior to 65536. This applies only to the external memory.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer.
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*/
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static inline struct dma_id plp_dma_l1ToExt_3d(dma_ext_t ext, unsigned int loc, unsigned short size, unsigned short stride, unsigned short length);
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static inline struct dma_id plp_cl_dma_l1ToExt_3d(dma_ext_t ext, unsigned int loc, unsigned short size, unsigned short stride, unsigned short length);
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/** Cluster memory to external memory 3-dimensional transfer with event-based completion.
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*
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\param src Address in the external memory where to store the data. There is no restriction on memory alignment.
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\param dst Address in the cluster memory where to load the data. There is no restriction on memory alignment.
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\param size Number of bytes to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param src_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param dst_stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536.
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\param num_reps Number of 1D transfers that comprise the 2D transfer.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer.
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*/
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static inline struct dma_id pulp_idma_L2ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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static inline struct dma_id pulp_cl_idma_L2ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps);
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/** External memory to cluster memory 3-dimensional transfer with event-based completion.
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*
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\param loc Address in the cluster memory where to store the data. There is no restriction on memory alignment.
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\param ext Address in the external memory where to load the data. There is no restriction on memory alignment.
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\param size Number of bytes to be transfered. The only restriction is that this size must fit 16 bits, i.e. must be inferior to 65536.
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\param stride 2D stride, which is the number of bytes which are added to the beginning of the current line to switch to the next one. Must fit 16 bits, i.e. must be inferior to 65536. This applies only to the external memory.
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\param length 2D length, which is the number of transfered bytes after which the DMA will switch to the next line. Must fit 16 bits, i.e. must be inferior to 65536. This applies only to the external memory.
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\return The identifier of the transfer. This can be used with plp_dma_wait to wait for the completion of this transfer
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*/
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static inline struct dma_id plp_dma_extToL1_3d(unsigned int loc, dma_ext_t ext, unsigned short size, unsigned short stride, unsigned short length);
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static inline struct dma_id plp_cl_dma_extToL1_3d(unsigned int loc, dma_ext_t ext, unsigned short size, unsigned short stride, unsigned short length);
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/** DMA-based zeromem using the "init" protocol.
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/** DMA-based zeromem using the "init" protocol.
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*
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*
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\param dst Address in memory to fill with zeros. There is no restriction on memory alignment.
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\param dst Address in memory to fill with zeros. There is no restriction on memory alignment.
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@ -455,6 +538,22 @@ static inline struct dma_id plp_cl_dma_extToL1_2d(unsigned int loc, dma_ext_t ex
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return pulp_cl_idma_L2ToL1_2d(loc, ext, length, stride, length, size/length);
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return pulp_cl_idma_L2ToL1_2d(loc, ext, length, stride, length, size/length);
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}
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}
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static inline struct dma_id plp_dma_l1ToExt_3d(dma_ext_t ext, unsigned int loc, unsigned short size, unsigned short stride, unsigned short length) {
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return pulp_idma_L1ToL2_3d(loc, ext, length, length, stride, size/length);
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}
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static inline struct dma_id plp_cl_dma_l1ToExt_3d(dma_ext_t ext, unsigned int loc, unsigned short size, unsigned short stride, unsigned short length) {
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return pulp_cl_idma_L1ToL2_3d(loc, ext, length, length, stride, size/length);
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}
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static inline struct dma_id plp_dma_extToL1_3d(unsigned int loc, dma_ext_t ext, unsigned short size, unsigned short stride, unsigned short length) {
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return pulp_idma_L2ToL1_3d(loc, ext, length, stride, length, size/length);
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}
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static inline struct dma_id plp_cl_dma_extToL1_3d(unsigned int loc, dma_ext_t ext, unsigned short size, unsigned short stride, unsigned short length) {
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return pulp_cl_idma_L2ToL1_3d(loc, ext, length, stride, length, size/length);
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}
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static inline unsigned int pulp_idma_set_conf_prot(unsigned int conf, idma_prot_t src_prot, idma_prot_t dst_prot){
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static inline unsigned int pulp_idma_set_conf_prot(unsigned int conf, idma_prot_t src_prot, idma_prot_t dst_prot){
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#if defined(__riscv__)
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#if defined(__riscv__)
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conf = __builtin_bitinsert(conf, src_prot, 3, IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET);
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conf = __builtin_bitinsert(conf, src_prot, 3, IDMA_REG32_3D_CONF_SRC_PROTOCOL_OFFSET);
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@ -702,6 +801,7 @@ static inline struct dma_id pulp_idma_memcpy_2d(unsigned int src, unsigned int d
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return id;
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return id;
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}
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}
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static inline struct dma_id pulp_cl_idma_memcpy_2d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot) {
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static inline struct dma_id pulp_cl_idma_memcpy_2d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot) {
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struct dma_id id;
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struct dma_id id;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_2D;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_2D;
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@ -779,6 +879,7 @@ static inline struct dma_id pulp_idma_L2ToL1_2d(unsigned int src, unsigned int d
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return id;
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return id;
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}
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}
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static inline struct dma_id pulp_cl_idma_L2ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
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static inline struct dma_id pulp_cl_idma_L2ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
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struct dma_id id;
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struct dma_id id;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_L2TOL1_2D;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_L2TOL1_2D;
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@ -797,6 +898,161 @@ static inline struct dma_id pulp_cl_idma_L2ToL1_2d(unsigned int src, unsigned in
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return id;
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return id;
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}
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}
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static inline struct dma_id pulp_idma_memcpy_3d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot) {
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struct dma_id id;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_3D;
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cfg = pulp_idma_set_conf_prot(cfg, src_prot, dst_prot);
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DMA_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
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DMA_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
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DMA_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
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DMA_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
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DMA_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
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DMA_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
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asm volatile("" : : : "memory");
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// Launch TX
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if (dst_prot == IDMA_PROT_AXI) {
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id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_0_REG_OFFSET);
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id.dma_strm_id = 0;
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} else {
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id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
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id.dma_strm_id = 1;
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}
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return id;
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}
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static inline struct dma_id pulp_cl_idma_memcpy_3d(unsigned int src, unsigned int dst, unsigned int size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps, idma_prot_t src_prot, idma_prot_t dst_prot) {
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struct dma_id id;
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unsigned int cfg = IDMA_DEFAULT_CONFIG_3D;
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cfg = pulp_idma_set_conf_prot(cfg, src_prot, dst_prot);
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DMA_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
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DMA_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
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DMA_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
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DMA_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
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DMA_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
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DMA_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
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asm volatile("" : : : "memory");
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// Launch TX
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if (dst_prot == IDMA_PROT_AXI) {
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id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_0_REG_OFFSET);
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id.dma_strm_id = 0;
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} else {
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id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
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id.dma_strm_id = 1;
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}
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|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_idma_L1ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L1TOL1_3D;
|
||||||
|
DMA_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 1;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_cl_idma_L1ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L1TOL1_3D;
|
||||||
|
DMA_CL_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_CL_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 1;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_idma_L2ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L2TOL1_3D;
|
||||||
|
DMA_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 1;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_cl_idma_L2ToL1_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L2TOL1_3D;
|
||||||
|
DMA_CL_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_CL_READ(IDMA_REG32_3D_NEXT_ID_1_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 1;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_idma_L1ToL2_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L1TOL2_3D;
|
||||||
|
DMA_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_READ(IDMA_REG32_3D_NEXT_ID_0_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 0;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct dma_id pulp_cl_idma_L1ToL2_3d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
|
struct dma_id id;
|
||||||
|
unsigned int cfg = IDMA_DEFAULT_CONFIG_L1TOL2_3D;
|
||||||
|
DMA_CL_WRITE(src, IDMA_REG32_3D_SRC_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst, IDMA_REG32_3D_DST_ADDR_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(size, IDMA_REG32_3D_LENGTH_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(cfg, IDMA_REG32_3D_CONF_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(src_stride, IDMA_REG32_3D_SRC_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(dst_stride, IDMA_REG32_3D_DST_STRIDE_3_LOW_REG_OFFSET);
|
||||||
|
DMA_CL_WRITE(num_reps, IDMA_REG32_3D_REPS_3_LOW_REG_OFFSET);
|
||||||
|
|
||||||
|
asm volatile("" : : : "memory");
|
||||||
|
id.dma_trns_id = DMA_CL_READ(IDMA_REG32_3D_NEXT_ID_0_REG_OFFSET);
|
||||||
|
id.dma_strm_id = 0;
|
||||||
|
|
||||||
|
return id;
|
||||||
|
}
|
||||||
|
|
||||||
static inline struct dma_id pulp_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
static inline struct dma_id pulp_idma_L1ToL1_2d(unsigned int src, unsigned int dst, unsigned short size, unsigned int src_stride, unsigned int dst_stride, unsigned int num_reps) {
|
||||||
struct dma_id id;
|
struct dma_id id;
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue