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start adapting for marsellus spi

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This commit is contained in:
Alfio Di Mauro 2020-05-11 14:18:06 +02:00
parent 5f70b3a8e5
commit 608e250886
4 changed files with 62 additions and 15 deletions
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20
drivers/spim.c
View file

@ -18,7 +18,7 @@
* @Author: Alfio Di Mauro
* @Date: 2020-03-23 09:33:29
* @Last Modified by: Alfio Di Mauro
* @Last Modified time: 2020-03-23 09:38:45
* @Last Modified time: 2020-05-11 13:28:30
*/
#include "pulp.h"
@ -29,7 +29,7 @@ static void spim_wait_tx_done(int periph)
{
#ifdef DEBUG
int periph_id = periph - ARCHI_SPIM_UART_ID(0);
int periph_id = periph - ARCHI_SPIM_QSPI_ID(0);
printf("periph_id = %d\n", periph_id);
#endif
@ -46,4 +46,18 @@ static void spim_wait_rx_done(int periph)
while (plp_udma_busy(UDMA_UART_RX_ADDR(periph - ARCHI_UDMA_UART_ID(0))))
{
}
}
}
int qspi_write_nb(int qspi_id, void *buffer, uint32_t size)
{
int periph_id = ARCHI_UDMA_QSPI_ID(qspi_id);
int channel = UDMA_CHANNEL_ID(periph_id) + 1;
unsigned int base = hal_udma_channel_base(channel);
plp_udma_enqueue(base, (int)buffer, size, UDMA_CHANNEL_CFG_EN | UDMA_CHANNEL_CFG_SIZE_8);
//uart_wait_tx_done(periph_id);
return 0;
}

22
include/archi/chips/marsellus/properties.h
View file

@ -125,35 +125,35 @@
#define ARCHI_UDMA_HAS_SPIM 1
#define ARCHI_UDMA_HAS_UART 1
#define ARCHI_UDMA_HAS_SDIO 1
#define ARCHI_UDMA_HAS_SDIO 0
#define ARCHI_UDMA_HAS_I2C 1
#define ARCHI_UDMA_HAS_I2S 1
#define ARCHI_UDMA_HAS_CAM 1
#define ARCHI_UDMA_HAS_TRACER 1
#define ARCHI_UDMA_HAS_FILTER 1
#define ARCHI_UDMA_NB_SPIM 3
#define ARCHI_UDMA_NB_SPIM 4
#define ARCHI_UDMA_NB_UART 2
#define ARCHI_UDMA_NB_I2C 3
#define ARCHI_UDMA_NB_SDIO 1
#define ARCHI_UDMA_NB_I2S 2
#define ARCHI_UDMA_NB_SDIO 0
#define ARCHI_UDMA_NB_I2S 1
#define ARCHI_UDMA_NB_CAM 1
#define ARCHI_UDMA_NB_TRACER 1
#define ARCHI_UDMA_NB_FILTER 1
#define ARCHI_UDMA_GEN_PER_ID(id) (0 + (id))
//#define ARCHI_UDMA_GEN_PER_ID(id) (0 + (id))
//#define ARCHI_UDMA_SDIO_ID(id) (4 + (id))
#define ARCHI_UDMA_UART_ID(id) (0 + (id))
#define ARCHI_UDMA_SPIM_ID(id) (2 + (id))
#define ARCHI_UDMA_I2C_ID(id) (6 + (id))
#define ARCHI_UDMA_I2C_ID(id) (10 + (id))
#define ARCHI_UDMA_I2S_ID(id) 13
#define ARCHI_UDMA_CAM_ID(id) 15
#define ARCHI_UDMA_FILTER_ID(id) (17 + (id))
#define ARCHI_UDMA_SDIO_ID(id) (4 + (id))
#define ARCHI_UDMA_I2S_ID(id) 5
#define ARCHI_UDMA_CAM_ID(id) 6
#define ARCHI_UDMA_FILTER_ID(id) (7 + (id))
#define ARCHI_UDMA_TRACER_ID(id) 8
#define ARCHI_UDMA_TGEN_ID(id) 9
#define ARCHI_NB_PERIPH 10
#define ARCHI_NB_PERIPH 17

33
include/hal/udma/spim/udma_spim_v3.h
View file

@ -35,4 +35,37 @@ static inline void plp_spim_reg_write(int channel, unsigned int addr, unsigned i
pulp_write32(ARCHI_UDMA_ADDR + UDMA_SPIM_OFFSET(channel) + UDMA_CHANNEL_CUSTOM_OFFSET + addr, cfg);
}
//static inline void plp_qspi_setup(int channel, int parity, uint16_t clk_counter)
//{
//
// // [31:16]: clock divider (from SoC clock)
// // [9]: RX enable
// // [8]: TX enable
// // [3]: stop bits 0 = 1 stop bit
// // 1 = 2 stop bits
// // [2:1]: bits 00 = 5 bits
// // 01 = 6 bits
// // 10 = 7 bits
// // 11 = 8 bits
// // [0]: parity
//
// unsigned int val = 0x0306 | parity; // both tx and rx enabled; 8N1 configuration; 1 stop bits
//
// val |= ((clk_counter) << 16);
//
// pulp_write32(ARCHI_UDMA_ADDR + UDMA_QSPI_OFFSET(channel) + UDMA_CHANNEL_CUSTOM_OFFSET + QSPI_SETUP_OFFSET, val);
//}
static inline void plp_qspi_disable(int channel) {
pulp_write32(ARCHI_UDMA_ADDR + UDMA_QSPI_OFFSET(channel) + UDMA_CHANNEL_CUSTOM_OFFSET + UART_SETUP_OFFSET, 0x00500006);
}
static inline int plp_qspi_tx_busy(int channel) {
return pulp_read32(ARCHI_UDMA_ADDR + UDMA_QSPI_OFFSET(channel) + UDMA_CHANNEL_CUSTOM_OFFSET + UART_STATUS_OFFSET) & 1;
}
static inline int plp_qspi_rx_busy(int channel) {
return (pulp_read32(ARCHI_UDMA_ADDR + UDMA_QSPI_OFFSET(channel) + UDMA_CHANNEL_CUSTOM_OFFSET + UART_STATUS_OFFSET) >> 1) & 1;
}
#endif

2
rules/pulpos/src.mk
View file

@ -6,7 +6,7 @@ ifeq '$(CONFIG_LIBC_MINIMAL)' '1'
PULP_SRCS += lib/libc/minimal/io.c lib/libc/minimal/fprintf.c lib/libc/minimal/prf.c lib/libc/minimal/sprintf.c
endif
PULP_SRCS += kernel/init.c kernel/kernel.c kernel/alloc.c kernel/alloc_pool.c kernel/irq.c kernel/soc_event.c kernel/bench.c drivers/uart.c
PULP_SRCS += kernel/init.c kernel/kernel.c kernel/alloc.c kernel/alloc_pool.c kernel/irq.c kernel/soc_event.c kernel/bench.c drivers/uart.c drivers/spim.c
PULP_ASM_SRCS += kernel/irq_asm.S