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Fix wrong sync loop address for non-astral chips

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This commit is contained in:
Andrea Belano 2024-11-13 17:39:40 +01:00
parent 3ba9a34966
commit 5a063a89f4
1 changed files with 1 additions and 1 deletions
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2
kernel/crt0.S
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@ -35,7 +35,7 @@ pos_init_entry:
#elif PULP_CHIP == CHIP_ASTRAL
li t0, 0x5003FFF0
#else
li t0, 0x1003FF0
li t0, 0x1003FFF0
#endif
sw x0, 0(t0)
# We check if the offset of the core is zero, so that even if the cluster