diff --git a/include/archi/chips/marsellus/properties.h b/include/archi/chips/marsellus/properties.h
index 9c14167..248321d 100644
--- a/include/archi/chips/marsellus/properties.h
+++ b/include/archi/chips/marsellus/properties.h
@@ -98,6 +98,7 @@
 #define ARCHI_FC_CID        31
 #define ARCHI_HAS_FC_ITC     1
 #define ARCHI_HAS_FC         1
+#define ARCHI_CORE_HAS_1_10  1
 
 
 /*
diff --git a/include/archi/chips/pulp/properties.h b/include/archi/chips/pulp/properties.h
index 35bcb96..0cbccff 100644
--- a/include/archi/chips/pulp/properties.h
+++ b/include/archi/chips/pulp/properties.h
@@ -99,6 +99,7 @@
 #define ARCHI_FC_CID        31
 #define ARCHI_HAS_FC_ITC     1
 #define ARCHI_HAS_FC         1
+#define ARCHI_CORE_HAS_1_10  1
 #endif
 
 
diff --git a/include/archi/chips/pulpissimo/properties.h b/include/archi/chips/pulpissimo/properties.h
index 9b9360d..51bd2b7 100644
--- a/include/archi/chips/pulpissimo/properties.h
+++ b/include/archi/chips/pulpissimo/properties.h
@@ -78,6 +78,7 @@
 #define ARCHI_FC_CID        31
 #define ARCHI_HAS_FC_ITC     1
 #define ARCHI_HAS_FC         1
+#define ARCHI_CORE_HAS_1_10  1
 
 
 
diff --git a/include/hal/timer/timer_v2.h b/include/hal/timer/timer_v2.h
index 2eb5802..d6923f1 100644
--- a/include/hal/timer/timer_v2.h
+++ b/include/hal/timer/timer_v2.h
@@ -42,6 +42,14 @@ static inline unsigned int timer_base_cl(int cid, int id, int sub_id)
   return ARCHI_CLUSTER_PERIPHERALS_GLOBAL_ADDR(0) + ARCHI_TIMER_OFFSET + id * ARCHI_TIMER_SIZE + sub_id * 4;
 }
 
+#else
+
+static inline unsigned int timer_base_cl(int cid, int id, int sub_id)
+{
+  return 0;
+}
+
+
 #endif
 
 
diff --git a/include/implem/irq.h b/include/implem/irq.h
index 326dfe9..575f691 100644
--- a/include/implem/irq.h
+++ b/include/implem/irq.h
@@ -23,11 +23,11 @@
 
 void pos_irq_init();
 
-void pos_irq_set_handler(int irq, void (*handler)());
+void rt_irq_set_handler(int irq, void (*handler)());
 
 
 
-static inline void pos_irq_mask_set(unsigned int mask)
+static inline void rt_irq_mask_set(unsigned int mask)
 {
 #if defined(__RISCV_GENERIC__)
     // Generic riscv case, e.g. Ibex
@@ -58,7 +58,7 @@ static inline void pos_irq_mask_set(unsigned int mask)
 
 
 
-static inline void pos_irq_mask_clr(unsigned int mask)
+static inline void rt_irq_mask_clr(unsigned int mask)
 {
 #if defined(__RISCV_GENERIC__)
     hal_spr_read_then_clr_from_reg(0x304, mask);
@@ -82,7 +82,7 @@ static inline void pos_irq_mask_clr(unsigned int mask)
 
 
 
-static inline void pos_irq_clr(unsigned int mask)
+static inline void rt_irq_clr(unsigned int mask)
 {
 #if defined(__RISCV_GENERIC__)
     // TODO 
@@ -101,7 +101,7 @@ static inline void pos_irq_clr(unsigned int mask)
 #endif
 }
 
-static inline unsigned int pos_irq_get_fc_vector_base()
+static inline unsigned int rt_irq_get_fc_vector_base()
 {
     if (hal_is_fc())
     {
@@ -129,7 +129,7 @@ static inline unsigned int pos_irq_get_fc_vector_base()
 
 
 
-static inline void pos_irq_set_fc_vector_base(unsigned int base)
+static inline void rt_irq_set_fc_vector_base(unsigned int base)
 {
     if (hal_is_fc())
     {
@@ -154,7 +154,7 @@ static inline void pos_irq_set_fc_vector_base(unsigned int base)
 }
 
 
-static inline void pos_irq_wait_for_interrupt()
+static inline void rt_irq_wait_for_interrupt()
 {
 #if !defined(ARCHI_HAS_FC) || defined(ARCHI_HAS_FC_EU)
     eu_evt_wait();
diff --git a/include/pulp.h b/include/pulp.h
index a3b8038..0b73277 100755
--- a/include/pulp.h
+++ b/include/pulp.h
@@ -34,12 +34,27 @@ typedef enum {
   PI_FREQ_DOMAIN_PERIPH = 2
 } pi_freq_domain_e;
 
+#ifdef ARCHI_HAS_CLUSTER
+
 void cluster_start(int cid, int (*entry)());
 
 void cluster_entry_stub();
 
 int cluster_wait(int cid);
 
+#else
+
+static inline void cluster_start(int cid, int (*entry)())
+{
+}
+
+static inline int cluster_wait(int cid)
+{
+  return 0;
+}
+
+#endif
+
 void _start();
 
 #include <implem/implem.h>
diff --git a/kernel/crt0.S b/kernel/crt0.S
index 50c2e65..e003faf 100644
--- a/kernel/crt0.S
+++ b/kernel/crt0.S
@@ -89,7 +89,7 @@ pos_init_entry:
 
 
 #ifdef ARCHI_CORE_HAS_1_10
-    j pos_illegal_instr
+    j __rt_handle_illegal_instr
 #else
     j pos_no_irq_handler
 #endif
@@ -134,7 +134,7 @@ _start:
 
 
 pos_illegal_instr:
-    j pos_irq_illegal_instr
+    j __rt_handle_illegal_instr
 
 pos_no_irq_handler:
     mret
diff --git a/kernel/fll-v1.c b/kernel/fll-v1.c
index f91ba81..0b0a858 100644
--- a/kernel/fll-v1.c
+++ b/kernel/fll-v1.c
@@ -98,9 +98,9 @@ void pos_freq_wait_convergence(int fll)
         if ( mult_factor_diff <= tolerance)
             break;
 
-        pos_irq_mask_set(1<<ARCHI_FC_EVT_CLK_REF);
-        pos_irq_wait_for_interrupt();
-        pos_irq_mask_clr(1<<ARCHI_FC_EVT_CLK_REF);
+        rt_irq_mask_set(1<<ARCHI_FC_EVT_CLK_REF);
+        rt_irq_wait_for_interrupt();
+        rt_irq_mask_clr(1<<ARCHI_FC_EVT_CLK_REF);
     } while (1);
 
     hal_irq_restore(irq);
diff --git a/kernel/irq.c b/kernel/irq.c
index bd465dd..5847070 100644
--- a/kernel/irq.c
+++ b/kernel/irq.c
@@ -43,7 +43,7 @@ static unsigned int pos_irq_get_itvec(unsigned int ItBaseAddr, unsigned int ItIn
 
 
 
-void pos_irq_set_handler(int irq, void (*handler)())
+void rt_irq_set_handler(int irq, void (*handler)())
 {
 #if defined(__RISCV_GENERIC__)
   if (irq < 16)
@@ -52,7 +52,7 @@ void pos_irq_set_handler(int irq, void (*handler)())
   irq -= 16;
 #endif
 
-  unsigned int base = pos_irq_get_fc_vector_base();
+  unsigned int base = rt_irq_get_fc_vector_base();
 
   unsigned int jmpAddr = base + 0x4 * irq;
 
@@ -70,7 +70,7 @@ void pos_irq_set_handler(int irq, void (*handler)())
 
 
 
-void pos_irq_illegal_instr()
+void __rt_handle_illegal_instr()
 {
   //unsigned int mepc = hal_mepc_read();
   //rt_warning("Reached illegal instruction (PC: 0x%x, opcode: 0x%x\n", mepc, *(int *)mepc);
@@ -83,9 +83,10 @@ void pos_irq_init()
 {
     // We may enter the runtime with some interrupts active for example
     // if we force the boot to jump to the runtime through jtag.
-    pos_irq_mask_clr(-1);
+    rt_irq_mask_clr(-1);
 
     // As the FC code may not be at the beginning of the L2, set the
     // vector base to get proper interrupt handlers
-    pos_irq_set_fc_vector_base(pos_irq_vector_base());
+
+    rt_irq_set_fc_vector_base(pos_irq_vector_base());
 }