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Minor fixes.
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Daira Hopwood 2020-12-25 21:38:18 +00:00
parent f23677cea9
commit fcb176aeb1
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book/src/concepts/cores.md
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@ -1,6 +1,6 @@
# Cores # Cores
The above is a fairly low-level description of a circuit. When implementing circuits we will The previous section gives a fairly low-level description of a circuit. When implementing circuits we will
typically use a higher-level API which aims for the desirable characteristics of auditability, typically use a higher-level API which aims for the desirable characteristics of auditability,
efficiency, modularity, and expressiveness. efficiency, modularity, and expressiveness.
@ -44,7 +44,7 @@ In R1CS (which may be more familiar to some readers, but don't worry if it isn't
consists of a "sea of gates" with no semantically significant ordering. Because of offset consists of a "sea of gates" with no semantically significant ordering. Because of offset
references, the order of rows in a UPA circuit, on the other hand, *is* significant. We're references, the order of rows in a UPA circuit, on the other hand, *is* significant. We're
going to make some simplifying assumptions and define some abstractions to tame the resulting going to make some simplifying assumptions and define some abstractions to tame the resulting
complexity: the aim will be that, [at the gadget level](#Gadgets) where we do most of our complexity: the aim will be that, [at the gadget level](gadgets.md) where we do most of our
circuit construction, we will not have to deal with relative references or with gate layout circuit construction, we will not have to deal with relative references or with gate layout
explicitly. explicitly.