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https://github.com/saymrwulf/onnxruntime.git
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7489bfee53
### Description Implementation of a new cast assembly kernel that uses AVX_NE_CONVERT instructions to accelerate casting from FP16 to FP32. Added CPUID checks to determine support of the ISA. ### Motivation and Context Currently FP16 models executed on systems that lack complete FP16 operator support use single precision on every node to run the model, this means the original FP16 weights have to be casted to FP32 in order to run the model properly, this change aims to accelerate the casting by using upconvert instructions and therefore improve performance.
59 lines
1.6 KiB
C++
59 lines
1.6 KiB
C++
/*++
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Copyright (c) Intel Corporation. All rights reserved.
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Licensed under the MIT License.
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Module Name:
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cast.cpp
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Abstract:
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This module implements Half (F16) to Single (F32) precision casting.
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--*/
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#include "mlasi.h"
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union fp32_bits {
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uint32_t u;
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float f;
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};
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void
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MLASCALL
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MlasConvertHalfToFloatBuffer(
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const unsigned short* Source,
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float* Destination,
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size_t Count
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)
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{
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if (GetMlasPlatform().CastF16ToF32Kernel == nullptr) {
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// If there is no kernel use the reference implementation, adapted from mlas_float16.h.
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constexpr fp32_bits magic = {113 << 23};
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constexpr uint32_t shifted_exp = 0x7c00 << 13; // exponent mask after shift
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for (size_t i = 0; i < Count; ++i) {
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fp32_bits o;
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o.u = (Source[i] & 0x7fff) << 13; // exponent/mantissa bits
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uint32_t exp = shifted_exp & o.u; // just the exponent
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o.u += (127 - 15) << 23; // exponent adjust
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// handle exponent special cases
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if (exp == shifted_exp) { // Inf/NaN?
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o.u += (128 - 16) << 23; // extra exp adjust
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} else if (exp == 0) { // Zero/Denormal?
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o.u += 1 << 23; // extra exp adjust
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o.f -= magic.f; // renormalize
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}
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o.u |= (Source[i] & 0x8000) << 16; // sign bit
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Destination[i] = o.f;
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}
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} else {
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// If the kernel is available, use it to perform the conversion.
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GetMlasPlatform().CastF16ToF32Kernel(Source, Destination, Count);
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}
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}
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