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Fix bad merge conflict resolution

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This commit is contained in:
Sumit Agarwal 2023-11-03 17:31:13 -05:00
parent 16bce38f03
commit c257367f86
5 changed files with 29 additions and 319 deletions
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4
onnxruntime/core/providers/dml/DmlExecutionProvider/src/GraphDescBuilder.cpp
View file

@ -149,7 +149,7 @@ namespace Dml::GraphDescBuilder
const std::unordered_map<std::string, std::pair<const ONNX_NAMESPACE::TensorProto*, bool>>& isInitializerTransferable,
const std::unordered_map<std::string, GraphNodeProperties>& graphNodePropertyMap,
IDMLDevice* device,
const void* executionHandle,
const ExecutionProviderImpl* executionHandle,
const onnxruntime::Path& modelPath,
gsl::span<const onnxruntime::Node* const> subgraphNodes,
gsl::span<const onnxruntime::NodeArg* const> subgraphInputs,
@ -198,7 +198,7 @@ namespace Dml::GraphDescBuilder
const uint32_t minNodeCountToReuseCommandList = 5;
bool reuseCommandList = false;
if (subgraphNodes.size() >= minNodeCountToReuseCommandList || providerImpl->IsMcdmDevice())
if (subgraphNodes.size() >= minNodeCountToReuseCommandList || executionHandle->IsMcdmDevice())
{
reuseCommandList = true;
}

2
onnxruntime/core/providers/dml/DmlExecutionProvider/src/GraphDescBuilder.h
View file

@ -48,7 +48,7 @@ namespace Dml
const std::unordered_map<std::string, std::pair<const ONNX_NAMESPACE::TensorProto*, bool>>& isInitializerTransferable,
const std::unordered_map<std::string, GraphNodeProperties>& graphNodePropertyMap,
IDMLDevice* device,
const void* executionHandle,
const ExecutionProviderImpl* executionHandle,
const onnxruntime::Path& modelPath,
gsl::span<const onnxruntime::Node* const> subgraphNodes,
gsl::span<const onnxruntime::NodeArg* const> subgraphInputs,

1
onnxruntime/core/providers/dml/OperatorAuthorHelper/Attributes.h
View file

@ -25,7 +25,6 @@ namespace AttrName
static constexpr const char* Broadcast = "broadcast";
static constexpr const char* ChannelsLast = "channels_last";
static constexpr const char* CeilMode = "ceil_mode";
static constexpr const char* ChannelsLast = "channels_last";
static constexpr const char* Clip = "clip";
static constexpr const char* CoordinateTransformationMode = "coordinate_transformation_mode";
static constexpr const char* CountIncludePad = "count_include_pad";

145
onnxruntime/core/providers/dml/dml_provider_factory.cc
View file

@ -208,128 +208,6 @@ static std::vector<AdapterInfo> FilterDXCoreAdapters(
return adapter_infos;
}
static void SortHeterogenousDXCoreAdapterList(
std::vector<AdapterInfo>& adapter_infos,
OrtDmlDeviceFilter filter,
OrtDmlPerformancePreference preference) {
if (adapter_infos.size() <= 1) {
return;
}
// When considering both GPUs and NPUs sort them by performance preference
// of Default (Gpus first), HighPerformance (GPUs first), or LowPower (NPUs first)
auto keep_npus = (filter & OrtDmlDeviceFilter::Npu) == OrtDmlDeviceFilter::Npu;
auto only_npus = filter == OrtDmlDeviceFilter::Npu;
if (!keep_npus || only_npus) {
return;
}
static bool IsHardwareAdapter(IDXCoreAdapter* adapter) {
bool is_hardware = false;
THROW_IF_FAILED(adapter->GetProperty(
DXCoreAdapterProperty::IsHardware,
&is_hardware));
return is_hardware;
}
static bool IsGPU(IDXCoreAdapter* compute_adapter) {
// Only considering hardware adapters
if (!IsHardwareAdapter(compute_adapter)) {
return false;
}
return compute_adapter->IsAttributeSupported(DXCORE_ADAPTER_ATTRIBUTE_D3D12_GRAPHICS);
}
static bool IsNPU(IDXCoreAdapter* compute_adapter) {
// Only considering hardware adapters
if (!IsHardwareAdapter(compute_adapter)) {
return false;
}
return !(compute_adapter->IsAttributeSupported(DXCORE_ADAPTER_ATTRIBUTE_D3D12_GRAPHICS));
}
enum class DeviceType { GPU, NPU, BadDevice };
static DeviceType FilterAdapterTypeQuery(IDXCoreAdapter* adapter, OrtDmlDeviceFilter filter) {
auto allow_gpus = (filter & OrtDmlDeviceFilter::Gpu) == OrtDmlDeviceFilter::Gpu;
if (IsGPU(adapter) && allow_gpus) {
return DeviceType::GPU;
}
auto allow_npus = (filter & OrtDmlDeviceFilter::Npu) == OrtDmlDeviceFilter::Npu;
if (IsNPU(adapter) && allow_npus) {
return DeviceType::NPU;
}
return DeviceType::BadDevice;
}
// Struct for holding each adapter
struct AdapterInfo {
ComPtr<IDXCoreAdapter> Adapter;
DeviceType Type; // GPU or NPU
};
static ComPtr<IDXCoreAdapterList> EnumerateDXCoreAdapters(IDXCoreAdapterFactory* adapter_factory) {
ComPtr<IDXCoreAdapterList> adapter_list;
// TODO: use_dxcore_workload_enumeration should be determined by QI
// When DXCore APIs are available QI for relevant enumeration interfaces
constexpr bool use_dxcore_workload_enumeration = false;
if (!use_dxcore_workload_enumeration) {
// Get a list of all the adapters that support compute
GUID attributes[]{ DXCORE_ADAPTER_ATTRIBUTE_D3D12_CORE_COMPUTE };
ORT_THROW_IF_FAILED(
adapter_factory->CreateAdapterList(_countof(attributes),
attributes,
adapter_list.GetAddressOf()));
}
return adapter_list;
}
static void SortDXCoreAdaptersByPreference(
IDXCoreAdapterList* adapter_list,
OrtDmlPerformancePreference preference) {
if (adapter_list->GetAdapterCount() <= 1) {
return;
}
// DML prefers the HighPerformance adapter by default
std::array<DXCoreAdapterPreference, 1> adapter_list_preferences = {
DXCoreAdapterPreference::HighPerformance
};
// If callers specify minimum power change the DXCore sort policy
// NOTE DXCoreAdapterPrefernce does not apply to mixed adapter lists - only to GPU lists
if (preference == OrtDmlPerformancePreference::MinimumPower) {
adapter_list_preferences[0] = DXCoreAdapterPreference::MinimumPower;
}
ORT_THROW_IF_FAILED(adapter_list->Sort(
static_cast<uint32_t>(adapter_list_preferences.size()),
adapter_list_preferences.data()));
}
static std::vector<AdapterInfo> FilterDXCoreAdapters(
IDXCoreAdapterList* adapter_list,
OrtDmlDeviceFilter filter) {
auto adapter_infos = std::vector<AdapterInfo>();
const uint32_t count = adapter_list->GetAdapterCount();
for (uint32_t i = 0; i < count; ++i) {
ComPtr<IDXCoreAdapter> candidate_adapter;
ORT_THROW_IF_FAILED(adapter_list->GetAdapter(i, candidate_adapter.GetAddressOf()));
// Add the adapters that are valid based on the device filter (GPU, NPU, or Both)
auto adapter_type = FilterAdapterTypeQuery(candidate_adapter.Get(), filter);
if (adapter_type != DeviceType::BadDevice) {
adapter_infos.push_back(AdapterInfo{candidate_adapter, adapter_type});
}
}
return adapter_infos;
}
static void SortHeterogenousDXCoreAdapterList(
std::vector<AdapterInfo>& adapter_infos,
OrtDmlDeviceFilter filter,
@ -626,27 +504,6 @@ std::shared_ptr<IExecutionProviderFactory> DMLProviderFactoryCreator::CreateFrom
return CreateDMLDeviceAndProviderFactory(d3d12_device.Get(), disable_metacommands, enable_dynamic_graph_fusion);
}
std::shared_ptr<IExecutionProviderFactory> DMLProviderFactoryCreator::Create(int device_id, bool skip_software_device_check) {
ComPtr<ID3D12Device> d3d12_device = CreateD3D12Device(device_id, skip_software_device_check);
return CreateDMLDeviceAndProviderFactory(d3d12_device.Get());
}
std::shared_ptr<IExecutionProviderFactory> DMLProviderFactoryCreator::CreateFromAdapterList(
std::vector<ComPtr<IDXCoreAdapter>>&& adapters) {
// Choose the first device from the list since it's the highest priority
auto adapter = adapters[0];
auto feature_level = D3D_FEATURE_LEVEL_11_0;
if (IsNPU(adapter.Get())) {
feature_level = D3D_FEATURE_LEVEL_1_0_CORE;
}
// Create D3D12 Device from DXCore Adapter
ComPtr<ID3D12Device> d3d12_device;
ORT_THROW_IF_FAILED(D3D12CreateDevice(adapter.Get(), feature_level, IID_GRAPHICS_PPV_ARGS(d3d12_device.ReleaseAndGetAddressOf())));
return CreateDMLDeviceAndProviderFactory(d3d12_device.Get());
}
} // namespace onnxruntime
// [[deprecated]]
@ -736,4 +593,4 @@ const OrtDmlApi* GetOrtDmlApi(_In_ uint32_t /*version*/) NO_EXCEPTION {
#else
return nullptr;
#endif
}
}

196
onnxruntime/test/providers/cpu/tensor/resize_op_test.cc
View file

@ -103,119 +103,14 @@ TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_with_extr
{kCudaExecutionProvider, kTensorrtExecutionProvider, kRocmExecutionProvider});
}
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_with_extrapolation_uint8) {
// OpTester test("Resize", 13);
// std::vector<float> scales{1.0f, 0.8f, 0.8f, 1.0f};
// std::vector<float> roi{0.0f, 0.4f, 0.6f, 0.0f, 1.0f, 1.2f, 1.7f, 1.0f};
//
// test.AddAttribute("mode", "linear");
// test.AddAttribute("coordinate_transformation_mode", "tf_crop_and_resize");
// test.AddAttribute("extrapolation_value", 10.0f);
//
// constexpr int64_t N = 1, H = 4, W = 4, C = 1;
// std::vector<uint8_t> X = {
// 1, 2, 3, 4,
// 5, 6, 7, 8,
// 9, 10, 11, 12,
// 13, 14, 15, 16};
//
// test.AddInput<uint8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {8}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<uint8_t> Y = {7, 10, 10,
// 12, 10, 10,
// 10, 10, 10};
//
// test.AddOutput<uint8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// // CUDA: result mismatch due to not implementing NHWC support
// // ROCm: results mismatch
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kCudaExecutionProvider, kRocmExecutionProvider, kQnnExecutionProvider});
//}
TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_with_extrapolation_uint8) {
OpTester test("Resize", 13);
std::vector<float> scales{1.0f, 0.8f, 0.8f, 1.0f};
std::vector<float> roi{0.0f, 0.4f, 0.6f, 0.0f, 1.0f, 1.2f, 1.7f, 1.0f};
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_with_extrapolation_int8) {
// OpTester test("Resize", 13);
// std::vector<float> scales{1.0f, 0.8f, 0.8f, 1.0f};
// std::vector<float> roi{0.0f, 0.4f, 0.6f, 0.0f, 1.0f, 1.2f, 1.7f, 1.0f};
//
// test.AddAttribute("mode", "linear");
// test.AddAttribute("coordinate_transformation_mode", "tf_crop_and_resize");
// test.AddAttribute("extrapolation_value", 10.0f);
//
// constexpr int64_t N = 1, H = 4, W = 4, C = 1;
// std::vector<int8_t> X = {
// 1, -2, 3, -4,
// -5, 6, -7, 8,
// 9, -10, 11, -12,
// -13, 14, -15, 16};
//
// test.AddInput<int8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {8}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<int8_t> Y = {-2, 10, 10,
// 0, 10, 10,
// 10, 10, 10};
//
// test.AddOutput<int8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kQnnExecutionProvider});
//}
//
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_without_extrapolation_uint8) {
// OpTester test("Resize", 13);
// std::vector<float> scales{1.0f, 0.8f, 0.8f, 1.0f};
// std::vector<float> roi{0.0f, 0.4f, 0.6f, 0.0f, 1.0f, 1.2f, 1.7f, 1.0f};
//
// test.AddAttribute("mode", "linear");
// test.AddAttribute("coordinate_transformation_mode", "tf_crop_and_resize");
//
// constexpr int64_t N = 1, H = 4, W = 4, C = 1;
// std::vector<uint8_t> X = {
// 1, 2, 3, 4,
// 5, 6, 7, 8,
// 9, 10, 11, 12,
// 13, 14, 15, 16};
//
// test.AddInput<uint8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {8}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<uint8_t> Y = {7, 0, 0,
// 12, 0, 0,
// 0, 0, 0};
//
// test.AddOutput<uint8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// // CUDA: result mismatch due to not implementing NHWC support
// // ROCm: results mismatch
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kCudaExecutionProvider, kRocmExecutionProvider, kQnnExecutionProvider});
//}
//
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_tf_crop_and_resize_without_extrapolation_int8) {
// OpTester test("Resize", 13);
// std::vector<float> scales{1.0f, 0.8f, 0.8f, 1.0f};
// std::vector<float> roi{0.0f, 0.4f, 0.6f, 0.0f, 1.0f, 1.2f, 1.7f, 1.0f};
//
// test.AddAttribute("mode", "linear");
// test.AddAttribute("coordinate_transformation_mode", "tf_crop_and_resize");
//
// constexpr int64_t N = 1, H = 4, W = 4, C = 1;
// std::vector<int8_t> X = {
// 1, -2, 3, -4,
// -5, 6, -7, 8,
// 9, -10, 11, -12,
// -13, 14, -15, 16};
//
// test.AddInput<int8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {8}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<int8_t> Y = {-2, 0, 0,
// 0, 0, 0,
// 0, 0, 0};
//
// test.AddOutput<int8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kQnnExecutionProvider});
//}
test.AddAttribute("mode", "linear");
test.AddAttribute("coordinate_transformation_mode", "tf_crop_and_resize");
test.AddAttribute("extrapolation_value", 10.0f);
constexpr int64_t N = 1, H = 4, W = 4, C = 1;
std::vector<uint8_t> X = {
@ -369,51 +264,10 @@ TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_4DBilinear) {
{kCudaExecutionProvider, kRocmExecutionProvider});
}
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_4DBilinear_uint8) {
// OpTester test("Resize", 13);
// std::vector<float> roi{};
// std::vector<float> scales{1.0f, 0.6f, 0.6f, 1.0f};
//
// test.AddAttribute("mode", "linear");
//
// constexpr int64_t N = 1, H = 2, W = 4, C = 1;
// std::vector<uint8_t> X = {
// 1, 2, 3, 4,
// 5, 6, 7, 8};
//
// test.AddInput<uint8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {0}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<uint8_t> Y = {2, 4};
//
// test.AddOutput<uint8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// // CUDA: result mismatch due to not implementing NHWC support
// // ROCm: results mismatch
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kCudaExecutionProvider, kRocmExecutionProvider, kQnnExecutionProvider});
//}
//
//TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_4DBilinear_int8) {
// OpTester test("Resize", 13);
// std::vector<float> roi{};
// std::vector<float> scales{1.0f, 0.6f, 0.6f, 1.0f};
//
// test.AddAttribute("mode", "linear");
//
// constexpr int64_t N = 1, H = 2, W = 4, C = 1;
// std::vector<int8_t> X = {
// 1, -2, 3, -4,
// -5, 6, -7, 8};
//
// test.AddInput<int8_t>("X", {N, H, W, C}, X);
// test.AddInput<float>("roi", {0}, roi);
// test.AddInput<float>("scales", {4}, scales);
//
// std::vector<int8_t> Y = {0, 0};
//
// test.AddOutput<int8_t>("Y", {N, static_cast<int64_t>(H * scales[1]), static_cast<int64_t>(W * scales[2]), C}, Y);
// test.Run(OpTester::ExpectResult::kExpectSuccess, "", {kQnnExecutionProvider});
//}
TEST(ResizeOpTest, NhwcResizeOpLinearDownSampleTest_4DBilinear_uint8) {
OpTester test("Resize", 13);
std::vector<float> roi{};
std::vector<float> scales{1.0f, 0.6f, 0.6f, 1.0f};
test.AddAttribute("mode", "linear");
@ -1897,19 +1751,19 @@ void ResizeOpTypeCheck_Ver_11_13_18(int opset_version) {
test.Run();
}
//TEST(ResizeOpTest, ResizeOpTypeCheck_Ver11) {
// ResizeOpTypeCheck_Ver_11_13_18<float>(11);
// ResizeOpTypeCheck_Ver_11_13_18<int32_t>(11);
// ResizeOpTypeCheck_Ver_11_13_18<int8_t>(11);
// ResizeOpTypeCheck_Ver_11_13_18<uint8_t>(11);
//}
//
//TEST(ResizeOpTest, ResizeOpTypeCheck_Ver13) {
// ResizeOpTypeCheck_Ver_11_13_18<float>(13);
// ResizeOpTypeCheck_Ver_11_13_18<int32_t>(13);
// ResizeOpTypeCheck_Ver_11_13_18<int8_t>(13);
// ResizeOpTypeCheck_Ver_11_13_18<uint8_t>(13);
//}
TEST(ResizeOpTest, ResizeOpTypeCheck_Ver11) {
ResizeOpTypeCheck_Ver_11_13_18<float>(11);
ResizeOpTypeCheck_Ver_11_13_18<int32_t>(11);
ResizeOpTypeCheck_Ver_11_13_18<int8_t>(11);
ResizeOpTypeCheck_Ver_11_13_18<uint8_t>(11);
}
TEST(ResizeOpTest, ResizeOpTypeCheck_Ver13) {
ResizeOpTypeCheck_Ver_11_13_18<float>(13);
ResizeOpTypeCheck_Ver_11_13_18<int32_t>(13);
ResizeOpTypeCheck_Ver_11_13_18<int8_t>(13);
ResizeOpTypeCheck_Ver_11_13_18<uint8_t>(13);
}
TEST(ResizeOpTest, ResizeOpTypeCheck_Ver18) {
ResizeOpTypeCheck_Ver_11_13_18<float>(18);
@ -2375,4 +2229,4 @@ TEST(ResizeOpTest, Antialias_Use_Extrapolation) {
{4, 4, 4}, X, {3, 3, 3}, Y);
}
} // namespace test
} // namespace onnxruntime
} // namespace onnxruntime