From 44b7002e3b5d6cb646bba1b715f42a1e15efc7f3 Mon Sep 17 00:00:00 2001 From: Yifan Li <109183385+yf711@users.noreply.github.com> Date: Tue, 13 Feb 2024 12:37:27 -0800 Subject: [PATCH] [TensorRT EP] Add missing doc for `trt_timing_cache_path` (#19478) ### Description The usage of `trt_timing_cache_path` is missing in TRTEP doc. To review the change: https://yf711.github.io/onnxruntime/docs/execution-providers/TensorRT-ExecutionProvider.html#configurations ### Motivation and Context --- docs/execution-providers/TensorRT-ExecutionProvider.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/docs/execution-providers/TensorRT-ExecutionProvider.md b/docs/execution-providers/TensorRT-ExecutionProvider.md index 7a9b371b60..93d3938a0c 100644 --- a/docs/execution-providers/TensorRT-ExecutionProvider.md +++ b/docs/execution-providers/TensorRT-ExecutionProvider.md @@ -90,6 +90,7 @@ There are two ways to configure TensorRT settings, either by **TensorRT Executio | trt_context_memory_sharing_enable | ORT_TENSORRT_CONTEXT_MEMORY_SHARING_ENABLE | bool | | trt_layer_norm_fp32_fallback | ORT_TENSORRT_LAYER_NORM_FP32_FALLBACK | bool | | trt_timing_cache_enable | ORT_TENSORRT_TIMING_CACHE_ENABLE | bool | +| trt_timing_cache_path | ORT_TENSORRT_TIMING_CACHE_PATH | string | | trt_force_timing_cache | ORT_TENSORRT_FORCE_TIMING_CACHE_ENABLE | bool | | trt_detailed_build_log | ORT_TENSORRT_DETAILED_BUILD_LOG_ENABLE | bool | | trt_build_heuristics_enable | ORT_TENSORRT_BUILD_HEURISTICS_ENABLE | bool | @@ -179,6 +180,9 @@ TensorRT configurations can be set by execution provider options. It's useful wh * `trt_timing_cache_enable`: Enable TensorRT timing cache. * Check [Timing cache](#timing-cache) for details. +* `trt_timing_cache_path`: Specify path for TensorRT timing cache if `trt_timing_cache_enable` is `True`. + * Not specifying a `trt_timing_cache_path` will result in using the working directory + * `trt_force_timing_cache`: Force the TensorRT timing cache to be used even if device profile does not match. * A perfect match is only the exact same GPU model as the on that produced the timing cache.