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Fix merge breaks

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This commit is contained in:
Ryan Hill 2021-04-12 17:08:11 -07:00
parent 57591f5b27
commit 20644043e5
17 changed files with 533 additions and 547 deletions
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4
onnxruntime/core/framework/provider_bridge_ort.cc
View file

@ -53,6 +53,7 @@ void Foo() {}
#include "orttraining/training_ops/cpu/controlflow/group.h"
#include "orttraining/training_ops/cpu/controlflow/record.h"
#include "orttraining/training_ops/cpu/controlflow/wait.h"
#include "orttraining/training_ops/cpu/controlflow/yield.h"
#include "orttraining/training_ops/cpu/loss/softmax_cross_entropy_loss.h"
#include "orttraining/training_ops/cpu/tensor/split.h"
#endif
@ -490,6 +491,7 @@ struct ProviderHostImpl : ProviderHost {
void KernelDefBuilder__Alias(KernelDefBuilder* p, int input_index, int output_index) override { p->Alias(input_index, output_index); }
void KernelDefBuilder__Alias(KernelDefBuilder* p, const std::vector<std::pair<int, int>>& aliases) override { p->Alias(aliases); }
void KernelDefBuilder__VariadicAlias(KernelDefBuilder* p, int input_offset, int output_offset) override { p->VariadicAlias(input_offset, output_offset); }
void KernelDefBuilder__ExternalOutputs(KernelDefBuilder* p) override { p->ExternalOutputs(); }
std::unique_ptr<KernelDef> KernelDefBuilder__Build(KernelDefBuilder* p) override { return p->Build(); }
@ -654,6 +656,7 @@ struct ProviderHostImpl : ProviderHost {
bool OpKernelInfo__TryGetConstantInput(const OpKernelInfo* p, int input_index, const Tensor** constant_input_value) override { return p->TryGetConstantInput(input_index, constant_input_value); }
uint32_t OpKernelInfo__GetInputCount(const OpKernelInfo* p) override { return p->GetInputCount(); }
uint32_t OpKernelInfo__GetOutputCount(const OpKernelInfo* p) override { return p->GetOutputCount(); }
const Node& OpKernelInfo__node(const OpKernelInfo* p) override { return p->node(); }
// SessionState
@ -836,6 +839,7 @@ struct ProviderHostImpl : ProviderHost {
void contrib__GetNDCFromLogitAndLabelShape(const TensorShape& logit_shape, const TensorShape& label_shape, int64_t& N_D, int64_t& C) override { contrib::GetNDCFromLogitAndLabelShape(logit_shape, label_shape, N_D, C); }
void contrib__GetPermutationAndShape(bool ncd_to_ndc, const TensorShape& tensor_shape, std::vector<int64_t>& new_shape, std::vector<size_t>& permutations) override { contrib::GetPermutationAndShape(ncd_to_ndc, tensor_shape, new_shape, permutations); }
Status contrib__PrepareForTrainingCompute(const TensorShape& input_shape, int num_outputs, int64_t& axis, int& before_dims, int& after_dims_including_split_axis, int& after_dims_excluding_split, std::vector<int64_t>& split_sizes) override { return contrib::PrepareForTrainingCompute(input_shape, num_outputs, axis, before_dims, after_dims_including_split_axis, after_dims_excluding_split, split_sizes); }
Status YieldOp__Compute(const contrib::YieldOp* p, OpKernelContext* context) override { return p->Compute(context); }
#endif
} provider_host_;

17
onnxruntime/core/providers/cuda/cuda_common.cc
View file

@ -2,8 +2,6 @@
// Licensed under the MIT License.
#include "core/providers/cuda/cuda_common.h"
#include "core/common/logging/logging.h"
#include "core/common/logging/severity.h"
#include "core/platform/env_var_utils.h"
namespace onnxruntime {
@ -29,20 +27,5 @@ const HalfGemmOptions* HalfGemmOptions::GetInstance() {
return &instance;
}
void HalfGemmOptions::Initialize(int value)
{
compute_16f_ = (value & 0x01) > 0;
#if defined(CUDA_VERSION) && CUDA_VERSION >= 11000
disallow_reduced_precision_reduction_ = (value & 0x02) > 0;
pedantic_ = (value & 0x04) > 0;
LOGS_DEFAULT(INFO) << "ORT_CUDA_GEMM_OPTIONS: compute_16f=" << instance.compute_16f_
<< " disallow_reduced_precision_reduction=" << instance.disallow_reduced_precision_reduction_
<< " pedantic=" << instance.pedantic_;
#else
LOGS_DEFAULT(INFO) << "ORT_CUDA_GEMM_OPTIONS: compute_16f=" << instance.compute_16f_;
#endif
initialized_ = true;
}
} // namespace cuda
} // namespace onnxruntime

20
onnxruntime/core/providers/cuda/cuda_common.h
View file

@ -103,12 +103,12 @@ inline bool CalculateFdmStrides(gsl::span<fast_divmod> p, const std::vector<int6
class CublasMathModeSetter {
public:
CublasMathModeSetter(const cudaDeviceProp& prop, cublasHandle_t handle, cublasMath_t mode) : prop_(prop), handle_(handle) {
#if defined(CUDA_VERSION) && CUDA_VERSION < 11000
enable_ = (mode == CUBLAS_TENSOR_OP_MATH ? prop.major >= 7 : true );
#if defined(CUDA_VERSION) && CUDA_VERSION < 11000
enable_ = (mode == CUBLAS_TENSOR_OP_MATH ? prop.major >= 7 : true);
#else
enable_ = (mode == CUBLAS_TF32_TENSOR_OP_MATH ? prop.major >= 8 : true);
#endif
if (enable_) {
cublasGetMathMode(handle, &mode_);
enable_ = (mode_ != mode);
@ -164,7 +164,19 @@ class HalfGemmOptions {
bool IsCompute16F() const { return compute_16f_; }
void Initialize(int value);
void Initialize(int value) {
compute_16f_ = (value & 0x01) > 0;
#if defined(CUDA_VERSION) && CUDA_VERSION >= 11000
disallow_reduced_precision_reduction_ = (value & 0x02) > 0;
pedantic_ = (value & 0x04) > 0;
LOGS_DEFAULT(INFO) << "ORT_CUDA_GEMM_OPTIONS: compute_16f=" << instance.compute_16f_
<< " disallow_reduced_precision_reduction=" << instance.disallow_reduced_precision_reduction_
<< " pedantic=" << instance.pedantic_;
#else
LOGS_DEFAULT(INFO) << "ORT_CUDA_GEMM_OPTIONS: compute_16f=" << instance.compute_16f_;
#endif
initialized_ = true;
}
private:
// Default is FP32. Aggregate in FP16 might be faster but the cost is loss in precision.

1
onnxruntime/core/providers/cuda/cuda_provider_factory.cc
View file

@ -149,4 +149,3 @@ ORT_API(onnxruntime::Provider*, GetProvider) {
return &onnxruntime::g_provider;
}
}

966
onnxruntime/core/providers/openvino/ov_versions/data_ops.cc
View file

File diff suppressed because it is too large Load diff

3
onnxruntime/core/providers/shared_library/provider_bridge_provider.cc
View file

@ -352,6 +352,7 @@ std::unique_ptr<OpKernelInfo> CopyOpKernelInfo(const OpKernelInfo& info) {
#ifdef ENABLE_TRAINING
#include "orttraining/training_ops/cpu/controlflow/group.h"
#include "orttraining/training_ops/cpu/controlflow/yield.h"
#endif
namespace onnxruntime {
@ -453,6 +454,8 @@ Tensor* AttentionBase::GetPresent(OpKernelContext* context, const Tensor* past,
return g_host->AttentionBase__GetPresent(this, context, past, batch_size, head_size, sequence_length, past_sequence_length);
}
Status YieldOp::Compute(OpKernelContext* context) const { return g_host->YieldOp__Compute(this, context); }
} // namespace contrib
#endif

10
onnxruntime/core/providers/shared_library/provider_interfaces.h
View file

@ -38,6 +38,7 @@ class LongformerAttentionBase;
class AttentionBase;
class Group;
class PassThrough;
class YieldOp;
} // namespace contrib
template <typename T, typename TResult>
@ -423,6 +424,7 @@ struct ProviderHost {
virtual void KernelDefBuilder__Alias(KernelDefBuilder* p, int input_index, int output_index) = 0;
virtual void KernelDefBuilder__Alias(KernelDefBuilder* p, const std::vector<std::pair<int, int>>& aliases) = 0;
virtual void KernelDefBuilder__VariadicAlias(KernelDefBuilder* p, int input_offset, int output_offset) = 0;
virtual void KernelDefBuilder__ExternalOutputs(KernelDefBuilder* p) = 0;
virtual std::unique_ptr<KernelDef> KernelDefBuilder__Build(KernelDefBuilder* p) = 0;
@ -572,6 +574,7 @@ struct ProviderHost {
virtual bool OpKernelInfo__TryGetConstantInput(const OpKernelInfo* p, int input_index, const Tensor** constant_input_value) = 0;
virtual uint32_t OpKernelInfo__GetInputCount(const OpKernelInfo* p) = 0;
virtual uint32_t OpKernelInfo__GetOutputCount(const OpKernelInfo* p) = 0;
virtual const Node& OpKernelInfo__node(const OpKernelInfo* p) = 0;
// SessionState
@ -753,6 +756,7 @@ struct ProviderHost {
virtual void contrib__GetNDCFromLogitAndLabelShape(const TensorShape& logit_shape, const TensorShape& label_shape, int64_t& N_D, int64_t& C) = 0;
virtual void contrib__GetPermutationAndShape(bool ncd_to_ndc, const TensorShape& tensor_shape, std::vector<int64_t>& new_shape, std::vector<size_t>& permutations) = 0;
virtual Status contrib__PrepareForTrainingCompute(const TensorShape& input_shape, int num_outputs, int64_t& axis, int& before_dims, int& after_dims_including_split_axis, int& after_dims_excluding_split, std::vector<int64_t>& split_sizes) = 0;
virtual Status YieldOp__Compute(const contrib::YieldOp* p, OpKernelContext* context) = 0;
#endif
};
@ -1154,6 +1158,11 @@ struct KernelDefBuilder {
return *this;
}
KernelDefBuilder& ExternalOutputs() {
g_host->KernelDefBuilder__ExternalOutputs(this);
return *this;
}
std::unique_ptr<KernelDef> Build() {
return g_host->KernelDefBuilder__Build(this);
}
@ -1445,6 +1454,7 @@ struct OpKernelInfo {
const KernelDef& GetKernelDef() const { return g_host->OpKernelInfo__GetKernelDef(this); }
uint32_t GetInputCount() const { return g_host->OpKernelInfo__GetInputCount(this); }
uint32_t GetOutputCount() const { return g_host->OpKernelInfo__GetOutputCount(this); }
const Node& node() const noexcept { return g_host->OpKernelInfo__node(this); }

1
onnxruntime/test/framework/test_utils.cc
View file

@ -70,4 +70,3 @@ std::map<std::string, int> CountOpsInGraph(const Graph& graph, bool recurse_into
} // namespace test
} // namespace onnxruntime

1
onnxruntime/test/framework/test_utils.h
View file

@ -114,4 +114,3 @@ std::map<std::string, int> CountOpsInGraph(const Graph& graph, bool recurse_into
} // namespace test
} // namespace onnxruntime

4
onnxruntime/test/providers/cuda/gemm_options_test.cc
View file

@ -8,6 +8,10 @@
namespace onnxruntime {
namespace cuda {
// Initialize the singleton instance
HalfGemmOptions HalfGemmOptions::instance;
namespace test {
TEST(CudaGemmOptionsTest, DefaultOptions) {

3
orttraining/orttraining/models/bert/main.cc
View file

@ -610,7 +610,7 @@ void setup_training_params(BertParameters& params) {
0,
nullptr};
if (params.cuda_mem_limit_in_gb > 0) {
if (params.gpu_mem_limit_in_gb > 0) {
info.gpu_mem_limit = gsl::narrow<size_t>(params.gpu_mem_limit_in_gb * 1024 * 1024 * 1024);
}
info.cudnn_conv_algo_search = OrtCudnnConvAlgoSearch::EXHAUSTIVE;
@ -884,4 +884,3 @@ int main(int argc, char* argv[]) {
#endif
return 0;
}

3
orttraining/orttraining/test/graph/gradient_graph_builder_test.cc
View file

@ -18,7 +18,7 @@
#if defined(USE_CUDA) || defined(USE_ROCM)
#include "bert_toy_fetches.h"
#elif USE_ROCM
#ifdef USE_ROCM
#include "core/providers/rocm/rocm_execution_provider.h"
#endif
#endif
@ -1896,4 +1896,3 @@ TEST(GradientGraphBuilderTest, TrainingSession_WithPipeline) {
} // namespace test
} // namespace onnxruntime

1
orttraining/orttraining/test/session/training_session_test_utils.cc
View file

@ -246,4 +246,3 @@ std::unique_ptr<TrainingSession> BuildAndRunTrainingSessionWithChecks(
} // namespace training_session_test_utils
} // namespace test
} // namespace onnxruntime

3
orttraining/orttraining/training_ops/cuda/controlflow/yield.cc
View file

@ -1,6 +1,7 @@
// Copyright (c) Microsoft Corporation. All rights reserved.
// Licensed under the MIT License.
#include "core/providers/shared_library/provider_api.h"
#include "orttraining/training_ops/cpu/controlflow/yield.h"
#include "core/providers/cuda/cuda_fwd.h"
@ -12,7 +13,7 @@ ONNX_OPERATOR_KERNEL_EX(
kMSDomain,
1,
kCudaExecutionProvider,
KernelDefBuilder()
(*KernelDefBuilder::Create())
.TypeConstraint("T", DataTypeImpl::AllFixedSizeTensorTypes())
.ExternalOutputs(),
onnxruntime::contrib::YieldOp);

18
orttraining/orttraining/training_ops/cuda/nn/conv_grad.cc
View file

@ -10,14 +10,14 @@
namespace onnxruntime {
namespace cuda {
#define REGISTER_GRADIENT_KERNEL_TYPED(T) \
ONNX_OPERATOR_TYPED_KERNEL_EX( \
ConvGrad, \
kMSDomain, \
1, \
T, \
kCudaExecutionProvider, \
KernelDefBuilder().TypeConstraint("T", DataTypeImpl::GetTensorType<T>()), \
#define REGISTER_GRADIENT_KERNEL_TYPED(T) \
ONNX_OPERATOR_TYPED_KERNEL_EX( \
ConvGrad, \
kMSDomain, \
1, \
T, \
kCudaExecutionProvider, \
(*KernelDefBuilder::Create()).TypeConstraint("T", DataTypeImpl::GetTensorType<T>()), \
ConvGrad<T>);
REGISTER_GRADIENT_KERNEL_TYPED(float)
@ -226,4 +226,4 @@ Status ConvGrad<T>::ComputeBiasGradient(Tensor* dB, const Tensor* dY) const {
}
} // namespace cuda
} // namespace onnxruntime
} // namespace onnxruntime

22
orttraining/orttraining/training_ops/cuda/nn/dropout_grad.cc
View file

@ -9,17 +9,17 @@
namespace onnxruntime {
namespace cuda {
#define REGISTER_GRADIENT_KERNEL(OpName) \
ONNX_OPERATOR_KERNEL_EX( \
OpName, \
kMSDomain, \
1, \
kCudaExecutionProvider, \
KernelDefBuilder() \
.TypeConstraint("T", ALL_IEEE_FLOAT_TENSOR_TYPES) \
.TypeConstraint("T1", ALL_IEEE_FLOAT_TENSOR_TYPES) \
.TypeConstraint("T2", DataTypeImpl::GetTensorType<bool>()) \
.InputMemoryType<OrtMemTypeCPUInput>(2), \
#define REGISTER_GRADIENT_KERNEL(OpName) \
ONNX_OPERATOR_KERNEL_EX( \
OpName, \
kMSDomain, \
1, \
kCudaExecutionProvider, \
(*KernelDefBuilder::Create()) \
.TypeConstraint("T", ALL_IEEE_FLOAT_TENSOR_TYPES) \
.TypeConstraint("T1", ALL_IEEE_FLOAT_TENSOR_TYPES) \
.TypeConstraint("T2", DataTypeImpl::GetTensorType<bool>()) \
.InputMemoryType(OrtMemTypeCPUInput, 2), \
DropoutGrad);
REGISTER_GRADIENT_KERNEL(DropoutGrad)

3
orttraining/orttraining/training_ops/cuda/tensor/concat.cc
View file

@ -10,7 +10,7 @@ ONNX_OPERATOR_KERNEL_EX(ConcatTraining,
1,
kCudaExecutionProvider,
(*KernelDefBuilder::Create())
.OutputMemoryType<OrtMemTypeCPUInput>(1)
.OutputMemoryType(OrtMemTypeCPUInput, 1)
.TypeConstraint("T", DataTypeImpl::AllFixedSizeTensorTypes()),
ConcatTraining);
@ -81,4 +81,3 @@ Status ConcatTraining::ComputeInternal(OpKernelContext* ctx) const {
}
} // namespace cuda
} // namespace onnxruntime